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Commit 412a9bbd authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'omap-for-v3.17/dt-part1' of...

Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Merge "omap dts changes for v3.17 merge window, part1" from Tony Lindgren:

First set of .dts changes for omaps for v3.17 merge window:

- Enable irqchip crossbar interrupt mapping. These changes
  are based on an immutable irqchip branch set up by Jason
  Cooper to make it easier to merge the related .dts changes.

- Removal of omap2 related static clock data that now comes
  from device tree.

- Enabling of PHY regulators for various omaps

- Enabling of PCIe for dra7

- Add support for am437x starterkit

- Enable audio for for omap5

- Enable display and am335x-evmsk

* tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

: (43 commits)
  ARM: DTS: omap5-uevm: Enable basic audio (McPDM <-> twl6040)
  ARM: DTS: omap5-uevm: Add node for twl6040 audio codec
  ARM: DTS: omap5-uevm: Enable palmas clk32kgaudio clock
  ARM: dts: dra7: Add dt data for PCIe controller
  ARM: dts: dra7: Add dt data for PCIe PHY
  ARM: dts: dra7: Add dt data for PCIe PHY control module
  ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
  ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
  ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
  ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
  ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
  ARM: dts: dra7-evm: Add regulator information to USB2 PHYs
  ARM: omap2plus_defconfig: enable TPS65218 configs
  ARM: dts: AM437x: Add TPS65218 device tree nodes
  ARM: dts: AM437x: Fix i2c nodes indentation
  ARM: dts: AM43x: Add TPS65218 device tree nodes
  ARM: dts: Add devicetree for Gumstix Pepper board
  ARM: dts: dra7: add crossbar device binding
  ARM: dts: dra7: add routable-irqs property for gic node
  ARM: OMAP24xx: clock: remove legacy clock data
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents c6ffdc07 3c9464ed
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+36 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be "ti,irq-crossbar"
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
	    register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -17,11 +18,46 @@ Required properties:
		 so crossbar bar driver should not consider them as free
		 lines.

Optional properties:
- ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
  SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
  crossbar. These irqs have a crossbar register, but still cannot be used.

- ti,irqs-safe-map: integer which maps to a safe configuration to use
  when the interrupt controller irq is unused (when not provided, default is 0)

Examples:
		crossbar_mpu: @4a020000 {
			compatible = "ti,irq-crossbar";
			reg = <0x4a002a48 0x130>;
			ti,max-irqs = <160>;
			ti,max-crossbar-sources = <400>;
			ti,reg-size = <2>;
			ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>;
			ti,irqs-skip = <10 133 139 140>;
		};

Consumer:
========
See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
Documentation/devicetree/bindings/arm/gic.txt for further details.

An interrupt consumer on an SoC using crossbar will use:
	interrupts = <GIC_SPI request_number interrupt_level>
When the request number is between 0 to that described by
"ti,max-crossbar-sources", it is assumed to be a crossbar mapping. If the
request_number is greater than "ti,max-crossbar-sources", then it is mapped as a
quirky hardware mapping direct to GIC.

Example:
	device_x@0x4a023000 {
		/* Crossbar 8 used */
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
		...
	};

	device_y@0x4a033000 {
		/* Direct mapped GIC SPI 1 used */
		interrupts = <GIC_SPI DIRECT_IRQ(1) IRQ_TYPE_LEVEL_HIGH>;
		...
	};
+3 −0
Original line number Diff line number Diff line
@@ -129,6 +129,9 @@ Boards:
- AM437x GP EVM
  compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43"

- AM437x SK EVM: AM437x StarterKit Evaluation Module
  compatible = "ti,am437x-sk-evm", "ti,am4372", "ti,am43"

- DRA742 EVM:  Software Development Board for DRA742
  compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"

+65 −0
Original line number Diff line number Diff line
OMAP PRCM bindings

Power Reset and Clock Manager lists the device clocks and clockdomains under
a DT hierarchy. Each TI SoC can have multiple PRCM entities listed for it,
each describing one module and the clock hierarchy under it. see [1] for
documentation about the individual clock/clockdomain nodes.

[1] Documentation/devicetree/bindings/clock/ti/*

Required properties:
- compatible:	Must be one of:
		"ti,am3-prcm"
		"ti,am3-scrm"
		"ti,am4-prcm"
		"ti,am4-scrm"
		"ti,omap2-prcm"
		"ti,omap2-scrm"
		"ti,omap3-prm"
		"ti,omap3-cm"
		"ti,omap3-scrm"
		"ti,omap4-cm1"
		"ti,omap4-prm"
		"ti,omap4-cm2"
		"ti,omap4-scrm"
		"ti,omap5-prm"
		"ti,omap5-cm-core-aon"
		"ti,omap5-scrm"
		"ti,omap5-cm-core"
		"ti,dra7-prm"
		"ti,dra7-cm-core-aon"
		"ti,dra7-cm-core"
- reg:		Contains PRCM module register address range
		(base address and length)
- clocks:	clocks for this module
- clockdomains:	clockdomains for this module

Example:

cm: cm@48004000 {
	compatible = "ti,omap3-cm";
	reg = <0x48004000 0x4000>;

	cm_clocks: clocks {
		#address-cells = <1>;
		#size-cells = <0>;
	};

	cm_clockdomains: clockdomains {
	};
}

&cm_clocks {
	omap2_32k_fck: omap_32k_fck {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
	};
};

&cm_clockdomains {
	core_l3_clkdm: core_l3_clkdm {
		compatible = "ti,clockdomain";
		clocks = <&sdrc_ick>;
	};
};
+3 −1
Original line number Diff line number Diff line
@@ -291,7 +291,8 @@ dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \
	am335x-boneblack.dtb \
	am335x-evm.dtb \
	am335x-evmsk.dtb \
	am335x-nano.dtb
	am335x-nano.dtb \
	am335x-pepper.dtb
dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \
	omap4-panda.dtb \
	omap4-panda-a4.dtb \
@@ -301,6 +302,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \
	omap4-var-dvk-om44.dtb \
	omap4-var-stk-om44.dtb
dtb-$(CONFIG_SOC_AM43XX) += am43x-epos-evm.dtb \
	am437x-sk-evm.dtb \
	am437x-gp-evm.dtb
dtb-$(CONFIG_SOC_OMAP5) += omap5-cm-t54.dtb \
	omap5-sbc-t54.dtb \
+105 −0
Original line number Diff line number Diff line
@@ -149,12 +149,113 @@
			"Headphone Jack",       "HPLOUT",
			"Headphone Jack",       "HPROUT";
	};

	panel {
		compatible = "ti,tilcdc,panel";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&lcd_pins_default>;
		pinctrl-1 = <&lcd_pins_sleep>;
		status = "okay";
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <32>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};
		display-timings {
			480x272 {
				hactive         = <480>;
				vactive         = <272>;
				hback-porch     = <43>;
				hfront-porch    = <8>;
				hsync-len       = <4>;
				vback-porch     = <12>;
				vfront-porch    = <4>;
				vsync-len       = <10>;
				clock-frequency = <9000000>;
				hsync-active    = <0>;
				vsync-active    = <0>;
			};
		};
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;

	lcd_pins_default: lcd_pins_default {
		pinctrl-single,pins = <
			0x20 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
			0x24 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
			0x28 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
			0x2c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
			0x30 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
			0x34 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
			0x38 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
			0x3c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
			0xa0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
			0xa4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
			0xa8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
			0xac (PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
			0xb0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
			0xb4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
			0xb8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
			0xbc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
			0xc0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
			0xc4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
			0xc8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
			0xcc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
			0xd0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
			0xd4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
			0xd8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
			0xdc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
			0xe0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
			0xe4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	lcd_pins_sleep: lcd_pins_sleep {
		pinctrl-single,pins = <
			0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad8.lcd_data23 */
			0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad9.lcd_data22 */
			0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad10.lcd_data21 */
			0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad11.lcd_data20 */
			0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad12.lcd_data19 */
			0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad13.lcd_data18 */
			0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad14.lcd_data17 */
			0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad15.lcd_data16 */
			0xa0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data0.lcd_data0 */
			0xa4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data1.lcd_data1 */
			0xa8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data2.lcd_data2 */
			0xac (PULL_DISABLE | MUX_MODE7)	/* lcd_data3.lcd_data3 */
			0xb0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data4.lcd_data4 */
			0xb4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data5.lcd_data5 */
			0xb8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data6.lcd_data6 */
			0xbc (PULL_DISABLE | MUX_MODE7)	/* lcd_data7.lcd_data7 */
			0xc0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data8.lcd_data8 */
			0xc4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data9.lcd_data9 */
			0xc8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data10.lcd_data10 */
			0xcc (PULL_DISABLE | MUX_MODE7)	/* lcd_data11.lcd_data11 */
			0xd0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data12.lcd_data12 */
			0xd4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data13.lcd_data13 */
			0xd8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data14.lcd_data14 */
			0xdc (PULL_DISABLE | MUX_MODE7)	/* lcd_data15.lcd_data15 */
			0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync */
			0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};


	user_leds_s0: user_leds_s0 {
		pinctrl-single,pins = <
			0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad4.gpio1_4 */
@@ -573,3 +674,7 @@
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};
};

&lcdc {
      status = "okay";
};
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