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Commit 41231001 authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Paulo Zanoni
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drm/i915/icl: Add initial Icelake definitions.



Icelake is an Intel® Processor containing an Intel® Graphics
Controller.

This is just an initial Icelake definition. PCI IDs, Icelake support
and new features coming in following patches.

v2: Add .ddb_size and .has_guc (Michal Wajdeczko).
v3: Add the ICL_FEATURES macro (Kelvin Gardiner).
v4 (from Paulo): Add missing __initconst (Paulo) and say "graphics
controller" instead of something that looks like an official marketing
name but isn't (Chris).

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-3-paulo.r.zanoni@intel.com
parent 841b5ed7
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+2 −0
Original line number Original line Diff line number Diff line
@@ -2594,6 +2594,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEMINILAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GEMINILAKE)
#define IS_GEMINILAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GEMINILAKE)
#define IS_COFFEELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_COFFEELAKE)
#define IS_COFFEELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_COFFEELAKE)
#define IS_CANNONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
#define IS_CANNONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
#define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
#define IS_MOBILE(dev_priv)	((dev_priv)->info.is_mobile)
#define IS_MOBILE(dev_priv)	((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
@@ -2705,6 +2706,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN8(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN8(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN9(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(8)))
#define IS_GEN9(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(8)))
#define IS_GEN10(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(9)))
#define IS_GEN10(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(9)))
#define IS_GEN11(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(10)))


#define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
#define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
#define IS_GEN9_LP(dev_priv)	(IS_GEN9(dev_priv) && IS_LP(dev_priv))
#define IS_GEN9_LP(dev_priv)	(IS_GEN9(dev_priv) && IS_LP(dev_priv))
+13 −0
Original line number Original line Diff line number Diff line
@@ -579,6 +579,19 @@ static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
	.gt = 2,
	.gt = 2,
};
};


#define GEN11_FEATURES \
	GEN10_FEATURES, \
	.gen = 11, \
	.ddb_size = 2048, \
	.has_csr = 0

static const struct intel_device_info intel_icelake_11_info __initconst = {
	GEN11_FEATURES,
	.platform = INTEL_ICELAKE,
	.is_alpha_support = 1,
	.has_resource_streamer = 0,
};

/*
/*
 * Make sure any device matches here are from most specific to most
 * Make sure any device matches here are from most specific to most
 * general.  For example, since the Quanta match is based on the subsystem
 * general.  For example, since the Quanta match is based on the subsystem
+1 −0
Original line number Original line Diff line number Diff line
@@ -56,6 +56,7 @@ static const char * const platform_names[] = {
	PLATFORM_NAME(GEMINILAKE),
	PLATFORM_NAME(GEMINILAKE),
	PLATFORM_NAME(COFFEELAKE),
	PLATFORM_NAME(COFFEELAKE),
	PLATFORM_NAME(CANNONLAKE),
	PLATFORM_NAME(CANNONLAKE),
	PLATFORM_NAME(ICELAKE),
};
};
#undef PLATFORM_NAME
#undef PLATFORM_NAME


+2 −0
Original line number Original line Diff line number Diff line
@@ -69,6 +69,8 @@ enum intel_platform {
	INTEL_COFFEELAKE,
	INTEL_COFFEELAKE,
	/* gen10 */
	/* gen10 */
	INTEL_CANNONLAKE,
	INTEL_CANNONLAKE,
	/* gen11 */
	INTEL_ICELAKE,
	INTEL_MAX_PLATFORMS
	INTEL_MAX_PLATFORMS
};
};