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Commit 40e231c7 authored by Thierry Reding's avatar Thierry Reding Committed by Stephen Warren
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ARM: tegra: Enable eDP for Venice2



Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the
Tegra124. The panel has an EDID to describe the video timings but needs
a few extra nodes to get the backlight to come up.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent d72be031
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+32 −0
Original line number Diff line number Diff line
@@ -16,6 +16,20 @@
		reg = <0x80000000 0x80000000>;
	};

	host1x@50000000 {
		sor@54540000 {
			status = "okay";

			nvidia,dpaux = <&dpaux>;
			nvidia,panel = <&panel>;
		};

		dpaux: dpaux@545c0000 {
			vdd-supply = <&vdd_3v3_panel>;
			status = "okay";
		};
	};

	pinmux: pinmux@70000868 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinmux_default>;
@@ -940,6 +954,17 @@
		};
	};

	backlight: backlight {
		compatible = "pwm-backlight";

		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
		power-supply = <&vdd_led>;
		pwms = <&pwm 1 1000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
@@ -965,6 +990,13 @@
		};
	};

	panel: panel {
		compatible = "lg,lp129qe", "simple-panel";

		backlight = <&backlight>;
		ddc-i2c-bus = <&dpaux>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;