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Commit 409ba47c authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Jeff Garzik
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(2.6.20) pata_oldpiix: fix PIO2 underclocking 



Fix the PIO mode 2 using mode 0 timings -- this driver should enable the
fast timing bank starting with PIO2, just like the ata_piix driver does.
Also, fix/rephrase some comments while at it.

Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 49554c19

drivers/ata/pata_oldpiix.c

+10 −8
Original line number Original line Diff line number Diff line
@@ -25,7 +25,7 @@ 
#include <linux/ata.h>

#include <linux/ata.h>





#define DRV_NAME	"pata_oldpiix"

#define DRV_NAME	"pata_oldpiix"

#define DRV_VERSION	"0.5.2"

#define DRV_VERSION	"0.5.3"





/**

/**

 *	oldpiix_pre_reset		-	probe begin

 *	oldpiix_pre_reset		-	probe begin
@@ -94,19 +94,21 @@ static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev) 
			    { 2, 1 },

			    { 2, 1 },

			    { 2, 3 }, };

			    { 2, 3 }, };





	if (pio > 2)

	if (pio > 1)

		control |= 1;	/* TIME1 enable */

		control |= 1;	/* TIME */

	if (ata_pio_need_iordy(adev))

	if (ata_pio_need_iordy(adev))

		control |= 2;	/* IE IORDY */

		control |= 2;	/* IE */





	/* Intel specifies that the PPE functionality is for disk only */

	/* Intel specifies that the prefetch/posting is for disk only */

	if (adev->class == ATA_DEV_ATA)

	if (adev->class == ATA_DEV_ATA)

		control |= 4;	/* PPE enable */

		control |= 4;	/* PPE */





	pci_read_config_word(dev, idetm_port, &idetm_data);

	pci_read_config_word(dev, idetm_port, &idetm_data);





	/* Enable PPE, IE and TIME as appropriate. Clear the other

	/*

	   drive timing bits */

	 * Set PPE, IE and TIME as appropriate.

	 * Clear the other drive's timing bits.

	 */

	if (adev->devno == 0) {

	if (adev->devno == 0) {

		idetm_data &= 0xCCE0;

		idetm_data &= 0xCCE0;

		idetm_data |= control;

		idetm_data |= control;