Loading arch/x86/include/asm/bitops.h +2 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,8 @@ #include <linux/compiler.h> #include <asm/alternative.h> #define BIT_64(n) (U64_C(1) << (n)) /* * These have to be done with inline assembly: that way the bit-setting * is guaranteed to be atomic. All bit operations return 0 if the bit Loading arch/x86/kernel/cpu/mcheck/mce.c +3 −3 Original line number Diff line number Diff line Loading @@ -1458,8 +1458,8 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) rdmsrl(msrs[i], val); /* CntP bit set? */ if (val & BIT(62)) { val &= ~BIT(62); if (val & BIT_64(62)) { val &= ~BIT_64(62); wrmsrl(msrs[i], val); } } Loading drivers/edac/mce_amd.h +0 −2 Original line number Diff line number Diff line Loading @@ -5,8 +5,6 @@ #include <asm/mce.h> #define BIT_64(n) (U64_C(1) << (n)) #define EC(x) ((x) & 0xffff) #define XEC(x, mask) (((x) >> 16) & mask) Loading Loading
arch/x86/include/asm/bitops.h +2 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,8 @@ #include <linux/compiler.h> #include <asm/alternative.h> #define BIT_64(n) (U64_C(1) << (n)) /* * These have to be done with inline assembly: that way the bit-setting * is guaranteed to be atomic. All bit operations return 0 if the bit Loading
arch/x86/kernel/cpu/mcheck/mce.c +3 −3 Original line number Diff line number Diff line Loading @@ -1458,8 +1458,8 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) rdmsrl(msrs[i], val); /* CntP bit set? */ if (val & BIT(62)) { val &= ~BIT(62); if (val & BIT_64(62)) { val &= ~BIT_64(62); wrmsrl(msrs[i], val); } } Loading
drivers/edac/mce_amd.h +0 −2 Original line number Diff line number Diff line Loading @@ -5,8 +5,6 @@ #include <asm/mce.h> #define BIT_64(n) (U64_C(1) << (n)) #define EC(x) ((x) & 0xffff) #define XEC(x, mask) (((x) >> 16) & mask) Loading