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Commit 3fd366d8 authored by Yuantian Tang's avatar Yuantian Tang Committed by Shawn Guo
Browse files

arm64: dts: ls1043a: add cpu idle support



Signed-off-by: default avatarTang Yuantian <andy.tang@nxp.com>
Signed-off-by: default avatarRan Wang <ran.wang_1@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9b4eefcb
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+21 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@
			clocks = <&clockgen 1 0>;
			next-level-cache = <&l2>;
			#cooling-cells = <2>;
			cpu-idle-states = <&CPU_PH20>;
		};

		cpu1: cpu@1 {
@@ -89,6 +90,7 @@
			reg = <0x1>;
			clocks = <&clockgen 1 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
		};

		cpu2: cpu@2 {
@@ -97,6 +99,7 @@
			reg = <0x2>;
			clocks = <&clockgen 1 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
		};

		cpu3: cpu@3 {
@@ -105,6 +108,7 @@
			reg = <0x3>;
			clocks = <&clockgen 1 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PH20>;
		};

		l2: l2-cache {
@@ -112,6 +116,23 @@
		};
	};

	idle-states {
		/*
		 * PSCI node is not added default, U-boot will add missing
		 * parts if it determines to use PSCI.
		 */
		entry-method = "arm,psci";

		CPU_PH20: cpu-ph20 {
			compatible = "arm,idle-state";
			idle-state-name = "PH20";
			arm,psci-suspend-param = <0x00010000>;
			entry-latency-us = <1000>;
			exit-latency-us = <1000>;
			min-residency-us = <3000>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0 0x80000000>;