drm/rs600/690: use autogenerated safe register tables. (3f7dc91a) · Commits · e / devices / android_kernel_teracube_emerald

drivers/gpu/drm/radeon/Makefile

+5 −0

Original line number	Original line	Diff line number	Diff line
	@@ -17,10 +17,15 @@ $(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
	$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable		$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
	$(call if_changed,mkregtable)		$(call if_changed,mkregtable)

			$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
			$(call if_changed,mkregtable)

	$(obj)/rv515.o: $(obj)/rv515_reg_safe.h		$(obj)/rv515.o: $(obj)/rv515_reg_safe.h

	$(obj)/r300.o: $(obj)/r300_reg_safe.h		$(obj)/r300.o: $(obj)/r300_reg_safe.h

			$(obj)/rs600.o: $(obj)/rs600_reg_safe.h

	radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \		radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \
	radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \		radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
	atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \		atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \

drivers/gpu/drm/radeon/radeon_asic.h

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -266,6 +266,7 @@ static struct radeon_asic rs400_asic = {
	/*		/*
	* rs600.		* rs600.
	*/		*/
			int rs600_init(struct radeon_device *rdev);
	void rs600_errata(struct radeon_device *rdev);		void rs600_errata(struct radeon_device *rdev);
	void rs600_vram_info(struct radeon_device *rdev);		void rs600_vram_info(struct radeon_device *rdev);
	int rs600_mc_init(struct radeon_device *rdev);		int rs600_mc_init(struct radeon_device *rdev);
	@@ -281,7 +282,7 @@ uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
	void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);		void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
	void rs600_bandwidth_update(struct radeon_device *rdev);		void rs600_bandwidth_update(struct radeon_device *rdev);
	static struct radeon_asic rs600_asic = {		static struct radeon_asic rs600_asic = {
	.init = &r300_init,		.init = &rs600_init,
	.errata = &rs600_errata,		.errata = &rs600_errata,
	.vram_info = &rs600_vram_info,		.vram_info = &rs600_vram_info,
	.gpu_reset = &r300_gpu_reset,		.gpu_reset = &r300_gpu_reset,
	@@ -316,7 +317,6 @@ static struct radeon_asic rs600_asic = {
	/*		/*
	* rs690,rs740		* rs690,rs740
	*/		*/
	int rs690_init(struct radeon_device *rdev);
	void rs690_errata(struct radeon_device *rdev);		void rs690_errata(struct radeon_device *rdev);
	void rs690_vram_info(struct radeon_device *rdev);		void rs690_vram_info(struct radeon_device *rdev);
	int rs690_mc_init(struct radeon_device *rdev);		int rs690_mc_init(struct radeon_device *rdev);
	@@ -325,7 +325,7 @@ uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
	void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);		void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
	void rs690_bandwidth_update(struct radeon_device *rdev);		void rs690_bandwidth_update(struct radeon_device *rdev);
	static struct radeon_asic rs690_asic = {		static struct radeon_asic rs690_asic = {
	.init = &rs690_init,		.init = &rs600_init,
	.errata = &rs690_errata,		.errata = &rs690_errata,
	.vram_info = &rs690_vram_info,		.vram_info = &rs690_vram_info,
	.gpu_reset = &r300_gpu_reset,		.gpu_reset = &r300_gpu_reset,

drivers/gpu/drm/radeon/reg_srcs/rs600

0 → 100644

+728 −0

Original line number	Original line	Diff line number	Diff line
			rs600 0x6d40
			0x1434 SRC_Y_X
			0x1438 DST_Y_X
			0x143C DST_HEIGHT_WIDTH
			0x146C DP_GUI_MASTER_CNTL
			0x1474 BRUSH_Y_X
			0x1478 DP_BRUSH_BKGD_CLR
			0x147C DP_BRUSH_FRGD_CLR
			0x1480 BRUSH_DATA0
			0x1484 BRUSH_DATA1
			0x1598 DST_WIDTH_HEIGHT
			0x15C0 CLR_CMP_CNTL
			0x15C4 CLR_CMP_CLR_SRC
			0x15C8 CLR_CMP_CLR_DST
			0x15CC CLR_CMP_MSK
			0x15D8 DP_SRC_FRGD_CLR
			0x15DC DP_SRC_BKGD_CLR
			0x1600 DST_LINE_START
			0x1604 DST_LINE_END
			0x1608 DST_LINE_PATCOUNT
			0x16C0 DP_CNTL
			0x16CC DP_WRITE_MSK
			0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
			0x16E8 DEFAULT_SC_BOTTOM_RIGHT
			0x16EC SC_TOP_LEFT
			0x16F0 SC_BOTTOM_RIGHT
			0x16F4 SRC_SC_BOTTOM_RIGHT
			0x1714 DSTCACHE_CTLSTAT
			0x1720 WAIT_UNTIL
			0x172C RBBM_GUICNTL
			0x1D98 VAP_VPORT_XSCALE
			0x1D9C VAP_VPORT_XOFFSET
			0x1DA0 VAP_VPORT_YSCALE
			0x1DA4 VAP_VPORT_YOFFSET
			0x1DA8 VAP_VPORT_ZSCALE
			0x1DAC VAP_VPORT_ZOFFSET
			0x2080 VAP_CNTL
			0x2090 VAP_OUT_VTX_FMT_0
			0x2094 VAP_OUT_VTX_FMT_1
			0x20B0 VAP_VTE_CNTL
			0x2138 VAP_VF_MIN_VTX_INDX
			0x2140 VAP_CNTL_STATUS
			0x2150 VAP_PROG_STREAM_CNTL_0
			0x2154 VAP_PROG_STREAM_CNTL_1
			0x2158 VAP_PROG_STREAM_CNTL_2
			0x215C VAP_PROG_STREAM_CNTL_3
			0x2160 VAP_PROG_STREAM_CNTL_4
			0x2164 VAP_PROG_STREAM_CNTL_5
			0x2168 VAP_PROG_STREAM_CNTL_6
			0x216C VAP_PROG_STREAM_CNTL_7
			0x2180 VAP_VTX_STATE_CNTL
			0x2184 VAP_VSM_VTX_ASSM
			0x2188 VAP_VTX_STATE_IND_REG_0
			0x218C VAP_VTX_STATE_IND_REG_1
			0x2190 VAP_VTX_STATE_IND_REG_2
			0x2194 VAP_VTX_STATE_IND_REG_3
			0x2198 VAP_VTX_STATE_IND_REG_4
			0x219C VAP_VTX_STATE_IND_REG_5
			0x21A0 VAP_VTX_STATE_IND_REG_6
			0x21A4 VAP_VTX_STATE_IND_REG_7
			0x21A8 VAP_VTX_STATE_IND_REG_8
			0x21AC VAP_VTX_STATE_IND_REG_9
			0x21B0 VAP_VTX_STATE_IND_REG_10
			0x21B4 VAP_VTX_STATE_IND_REG_11
			0x21B8 VAP_VTX_STATE_IND_REG_12
			0x21BC VAP_VTX_STATE_IND_REG_13
			0x21C0 VAP_VTX_STATE_IND_REG_14
			0x21C4 VAP_VTX_STATE_IND_REG_15
			0x21DC VAP_PSC_SGN_NORM_CNTL
			0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
			0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
			0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
			0x21EC VAP_PROG_STREAM_CNTL_EXT_3
			0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
			0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
			0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
			0x21FC VAP_PROG_STREAM_CNTL_EXT_7
			0x2200 VAP_PVS_VECTOR_INDX_REG
			0x2204 VAP_PVS_VECTOR_DATA_REG
			0x2208 VAP_PVS_VECTOR_DATA_REG_128
			0x221C VAP_CLIP_CNTL
			0x2220 VAP_GB_VERT_CLIP_ADJ
			0x2224 VAP_GB_VERT_DISC_ADJ
			0x2228 VAP_GB_HORZ_CLIP_ADJ
			0x222C VAP_GB_HORZ_DISC_ADJ
			0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
			0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
			0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
			0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
			0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
			0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
			0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
			0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
			0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
			0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
			0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
			0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
			0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
			0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
			0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
			0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
			0x2284 VAP_PVS_STATE_FLUSH_REG
			0x2288 VAP_PVS_VTX_TIMEOUT_REG
			0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
			0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
			0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
			0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
			0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
			0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
			0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
			0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
			0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
			0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
			0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
			0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
			0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
			0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
			0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
			0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
			0x22D0 VAP_PVS_CODE_CNTL_0
			0x22D4 VAP_PVS_CONST_CNTL
			0x22D8 VAP_PVS_CODE_CNTL_1
			0x22DC VAP_PVS_FLOW_CNTL_OPC
			0x342C RB2D_DSTCACHE_CTLSTAT
			0x4000 GB_VAP_RASTER_VTX_FMT_0
			0x4004 GB_VAP_RASTER_VTX_FMT_1
			0x4008 GB_ENABLE
			0x401C GB_SELECT
			0x4020 GB_AA_CONFIG
			0x4024 GB_FIFO_SIZE
			0x4100 TX_INVALTAGS
			0x4200 GA_POINT_S0
			0x4204 GA_POINT_T0
			0x4208 GA_POINT_S1
			0x420C GA_POINT_T1
			0x4214 GA_TRIANGLE_STIPPLE
			0x421C GA_POINT_SIZE
			0x4230 GA_POINT_MINMAX
			0x4234 GA_LINE_CNTL
			0x4238 GA_LINE_STIPPLE_CONFIG
			0x4260 GA_LINE_STIPPLE_VALUE
			0x4264 GA_LINE_S0
			0x4268 GA_LINE_S1
			0x4278 GA_COLOR_CONTROL
			0x427C GA_SOLID_RG
			0x4280 GA_SOLID_BA
			0x4288 GA_POLY_MODE
			0x428C GA_ROUND_MODE
			0x4290 GA_OFFSET
			0x4294 GA_FOG_SCALE
			0x4298 GA_FOG_OFFSET
			0x42A0 SU_TEX_WRAP
			0x42A4 SU_POLY_OFFSET_FRONT_SCALE
			0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
			0x42AC SU_POLY_OFFSET_BACK_SCALE
			0x42B0 SU_POLY_OFFSET_BACK_OFFSET
			0x42B4 SU_POLY_OFFSET_ENABLE
			0x42B8 SU_CULL_MODE
			0x42C0 SU_DEPTH_SCALE
			0x42C4 SU_DEPTH_OFFSET
			0x42C8 SU_REG_DEST
			0x4300 RS_COUNT
			0x4304 RS_INST_COUNT
			0x4310 RS_IP_0
			0x4314 RS_IP_1
			0x4318 RS_IP_2
			0x431C RS_IP_3
			0x4320 RS_IP_4
			0x4324 RS_IP_5
			0x4328 RS_IP_6
			0x432C RS_IP_7
			0x4330 RS_INST_0
			0x4334 RS_INST_1
			0x4338 RS_INST_2
			0x433C RS_INST_3
			0x4340 RS_INST_4
			0x4344 RS_INST_5
			0x4348 RS_INST_6
			0x434C RS_INST_7
			0x4350 RS_INST_8
			0x4354 RS_INST_9
			0x4358 RS_INST_10
			0x435C RS_INST_11
			0x4360 RS_INST_12
			0x4364 RS_INST_13
			0x4368 RS_INST_14
			0x436C RS_INST_15
			0x43A4 SC_HYPERZ_EN
			0x43A8 SC_EDGERULE
			0x43B0 SC_CLIP_0_A
			0x43B4 SC_CLIP_0_B
			0x43B8 SC_CLIP_1_A
			0x43BC SC_CLIP_1_B
			0x43C0 SC_CLIP_2_A
			0x43C4 SC_CLIP_2_B
			0x43C8 SC_CLIP_3_A
			0x43CC SC_CLIP_3_B
			0x43D0 SC_CLIP_RULE
			0x43E0 SC_SCISSOR0
			0x43E8 SC_SCREENDOOR
			0x4440 TX_FILTER1_0
			0x4444 TX_FILTER1_1
			0x4448 TX_FILTER1_2
			0x444C TX_FILTER1_3
			0x4450 TX_FILTER1_4
			0x4454 TX_FILTER1_5
			0x4458 TX_FILTER1_6
			0x445C TX_FILTER1_7
			0x4460 TX_FILTER1_8
			0x4464 TX_FILTER1_9
			0x4468 TX_FILTER1_10
			0x446C TX_FILTER1_11
			0x4470 TX_FILTER1_12
			0x4474 TX_FILTER1_13
			0x4478 TX_FILTER1_14
			0x447C TX_FILTER1_15
			0x4580 TX_CHROMA_KEY_0
			0x4584 TX_CHROMA_KEY_1
			0x4588 TX_CHROMA_KEY_2
			0x458C TX_CHROMA_KEY_3
			0x4590 TX_CHROMA_KEY_4
			0x4594 TX_CHROMA_KEY_5
			0x4598 TX_CHROMA_KEY_6
			0x459C TX_CHROMA_KEY_7
			0x45A0 TX_CHROMA_KEY_8
			0x45A4 TX_CHROMA_KEY_9
			0x45A8 TX_CHROMA_KEY_10
			0x45AC TX_CHROMA_KEY_11
			0x45B0 TX_CHROMA_KEY_12
			0x45B4 TX_CHROMA_KEY_13
			0x45B8 TX_CHROMA_KEY_14
			0x45BC TX_CHROMA_KEY_15
			0x45C0 TX_BORDER_COLOR_0
			0x45C4 TX_BORDER_COLOR_1
			0x45C8 TX_BORDER_COLOR_2
			0x45CC TX_BORDER_COLOR_3
			0x45D0 TX_BORDER_COLOR_4
			0x45D4 TX_BORDER_COLOR_5
			0x45D8 TX_BORDER_COLOR_6
			0x45DC TX_BORDER_COLOR_7
			0x45E0 TX_BORDER_COLOR_8
			0x45E4 TX_BORDER_COLOR_9
			0x45E8 TX_BORDER_COLOR_10
			0x45EC TX_BORDER_COLOR_11
			0x45F0 TX_BORDER_COLOR_12
			0x45F4 TX_BORDER_COLOR_13
			0x45F8 TX_BORDER_COLOR_14
			0x45FC TX_BORDER_COLOR_15
			0x4600 US_CONFIG
			0x4604 US_PIXSIZE
			0x4608 US_CODE_OFFSET
			0x460C US_RESET
			0x4610 US_CODE_ADDR_0
			0x4614 US_CODE_ADDR_1
			0x4618 US_CODE_ADDR_2
			0x461C US_CODE_ADDR_3
			0x4620 US_TEX_INST_0
			0x4624 US_TEX_INST_1
			0x4628 US_TEX_INST_2
			0x462C US_TEX_INST_3
			0x4630 US_TEX_INST_4
			0x4634 US_TEX_INST_5
			0x4638 US_TEX_INST_6
			0x463C US_TEX_INST_7
			0x4640 US_TEX_INST_8
			0x4644 US_TEX_INST_9
			0x4648 US_TEX_INST_10
			0x464C US_TEX_INST_11
			0x4650 US_TEX_INST_12
			0x4654 US_TEX_INST_13
			0x4658 US_TEX_INST_14
			0x465C US_TEX_INST_15
			0x4660 US_TEX_INST_16
			0x4664 US_TEX_INST_17
			0x4668 US_TEX_INST_18
			0x466C US_TEX_INST_19
			0x4670 US_TEX_INST_20
			0x4674 US_TEX_INST_21
			0x4678 US_TEX_INST_22
			0x467C US_TEX_INST_23
			0x4680 US_TEX_INST_24
			0x4684 US_TEX_INST_25
			0x4688 US_TEX_INST_26
			0x468C US_TEX_INST_27
			0x4690 US_TEX_INST_28
			0x4694 US_TEX_INST_29
			0x4698 US_TEX_INST_30
			0x469C US_TEX_INST_31
			0x46A4 US_OUT_FMT_0
			0x46A8 US_OUT_FMT_1
			0x46AC US_OUT_FMT_2
			0x46B0 US_OUT_FMT_3
			0x46B4 US_W_FMT
			0x46C0 US_ALU_RGB_ADDR_0
			0x46C4 US_ALU_RGB_ADDR_1
			0x46C8 US_ALU_RGB_ADDR_2
			0x46CC US_ALU_RGB_ADDR_3
			0x46D0 US_ALU_RGB_ADDR_4
			0x46D4 US_ALU_RGB_ADDR_5
			0x46D8 US_ALU_RGB_ADDR_6
			0x46DC US_ALU_RGB_ADDR_7
			0x46E0 US_ALU_RGB_ADDR_8
			0x46E4 US_ALU_RGB_ADDR_9
			0x46E8 US_ALU_RGB_ADDR_10
			0x46EC US_ALU_RGB_ADDR_11
			0x46F0 US_ALU_RGB_ADDR_12
			0x46F4 US_ALU_RGB_ADDR_13
			0x46F8 US_ALU_RGB_ADDR_14
			0x46FC US_ALU_RGB_ADDR_15
			0x4700 US_ALU_RGB_ADDR_16
			0x4704 US_ALU_RGB_ADDR_17
			0x4708 US_ALU_RGB_ADDR_18
			0x470C US_ALU_RGB_ADDR_19
			0x4710 US_ALU_RGB_ADDR_20
			0x4714 US_ALU_RGB_ADDR_21
			0x4718 US_ALU_RGB_ADDR_22
			0x471C US_ALU_RGB_ADDR_23
			0x4720 US_ALU_RGB_ADDR_24
			0x4724 US_ALU_RGB_ADDR_25
			0x4728 US_ALU_RGB_ADDR_26
			0x472C US_ALU_RGB_ADDR_27
			0x4730 US_ALU_RGB_ADDR_28
			0x4734 US_ALU_RGB_ADDR_29
			0x4738 US_ALU_RGB_ADDR_30
			0x473C US_ALU_RGB_ADDR_31
			0x4740 US_ALU_RGB_ADDR_32
			0x4744 US_ALU_RGB_ADDR_33
			0x4748 US_ALU_RGB_ADDR_34
			0x474C US_ALU_RGB_ADDR_35
			0x4750 US_ALU_RGB_ADDR_36
			0x4754 US_ALU_RGB_ADDR_37
			0x4758 US_ALU_RGB_ADDR_38
			0x475C US_ALU_RGB_ADDR_39
			0x4760 US_ALU_RGB_ADDR_40
			0x4764 US_ALU_RGB_ADDR_41
			0x4768 US_ALU_RGB_ADDR_42
			0x476C US_ALU_RGB_ADDR_43
			0x4770 US_ALU_RGB_ADDR_44
			0x4774 US_ALU_RGB_ADDR_45
			0x4778 US_ALU_RGB_ADDR_46
			0x477C US_ALU_RGB_ADDR_47
			0x4780 US_ALU_RGB_ADDR_48
			0x4784 US_ALU_RGB_ADDR_49
			0x4788 US_ALU_RGB_ADDR_50
			0x478C US_ALU_RGB_ADDR_51
			0x4790 US_ALU_RGB_ADDR_52
			0x4794 US_ALU_RGB_ADDR_53
			0x4798 US_ALU_RGB_ADDR_54
			0x479C US_ALU_RGB_ADDR_55
			0x47A0 US_ALU_RGB_ADDR_56
			0x47A4 US_ALU_RGB_ADDR_57
			0x47A8 US_ALU_RGB_ADDR_58
			0x47AC US_ALU_RGB_ADDR_59
			0x47B0 US_ALU_RGB_ADDR_60
			0x47B4 US_ALU_RGB_ADDR_61
			0x47B8 US_ALU_RGB_ADDR_62
			0x47BC US_ALU_RGB_ADDR_63
			0x47C0 US_ALU_ALPHA_ADDR_0
			0x47C4 US_ALU_ALPHA_ADDR_1
			0x47C8 US_ALU_ALPHA_ADDR_2
			0x47CC US_ALU_ALPHA_ADDR_3
			0x47D0 US_ALU_ALPHA_ADDR_4
			0x47D4 US_ALU_ALPHA_ADDR_5
			0x47D8 US_ALU_ALPHA_ADDR_6
			0x47DC US_ALU_ALPHA_ADDR_7
			0x47E0 US_ALU_ALPHA_ADDR_8
			0x47E4 US_ALU_ALPHA_ADDR_9
			0x47E8 US_ALU_ALPHA_ADDR_10
			0x47EC US_ALU_ALPHA_ADDR_11
			0x47F0 US_ALU_ALPHA_ADDR_12
			0x47F4 US_ALU_ALPHA_ADDR_13
			0x47F8 US_ALU_ALPHA_ADDR_14
			0x47FC US_ALU_ALPHA_ADDR_15
			0x4800 US_ALU_ALPHA_ADDR_16
			0x4804 US_ALU_ALPHA_ADDR_17
			0x4808 US_ALU_ALPHA_ADDR_18
			0x480C US_ALU_ALPHA_ADDR_19
			0x4810 US_ALU_ALPHA_ADDR_20
			0x4814 US_ALU_ALPHA_ADDR_21
			0x4818 US_ALU_ALPHA_ADDR_22
			0x481C US_ALU_ALPHA_ADDR_23
			0x4820 US_ALU_ALPHA_ADDR_24
			0x4824 US_ALU_ALPHA_ADDR_25
			0x4828 US_ALU_ALPHA_ADDR_26
			0x482C US_ALU_ALPHA_ADDR_27
			0x4830 US_ALU_ALPHA_ADDR_28
			0x4834 US_ALU_ALPHA_ADDR_29
			0x4838 US_ALU_ALPHA_ADDR_30
			0x483C US_ALU_ALPHA_ADDR_31
			0x4840 US_ALU_ALPHA_ADDR_32
			0x4844 US_ALU_ALPHA_ADDR_33
			0x4848 US_ALU_ALPHA_ADDR_34
			0x484C US_ALU_ALPHA_ADDR_35
			0x4850 US_ALU_ALPHA_ADDR_36
			0x4854 US_ALU_ALPHA_ADDR_37
			0x4858 US_ALU_ALPHA_ADDR_38
			0x485C US_ALU_ALPHA_ADDR_39
			0x4860 US_ALU_ALPHA_ADDR_40
			0x4864 US_ALU_ALPHA_ADDR_41
			0x4868 US_ALU_ALPHA_ADDR_42
			0x486C US_ALU_ALPHA_ADDR_43
			0x4870 US_ALU_ALPHA_ADDR_44
			0x4874 US_ALU_ALPHA_ADDR_45
			0x4878 US_ALU_ALPHA_ADDR_46
			0x487C US_ALU_ALPHA_ADDR_47
			0x4880 US_ALU_ALPHA_ADDR_48
			0x4884 US_ALU_ALPHA_ADDR_49
			0x4888 US_ALU_ALPHA_ADDR_50
			0x488C US_ALU_ALPHA_ADDR_51
			0x4890 US_ALU_ALPHA_ADDR_52
			0x4894 US_ALU_ALPHA_ADDR_53
			0x4898 US_ALU_ALPHA_ADDR_54
			0x489C US_ALU_ALPHA_ADDR_55
			0x48A0 US_ALU_ALPHA_ADDR_56
			0x48A4 US_ALU_ALPHA_ADDR_57
			0x48A8 US_ALU_ALPHA_ADDR_58
			0x48AC US_ALU_ALPHA_ADDR_59
			0x48B0 US_ALU_ALPHA_ADDR_60
			0x48B4 US_ALU_ALPHA_ADDR_61
			0x48B8 US_ALU_ALPHA_ADDR_62
			0x48BC US_ALU_ALPHA_ADDR_63
			0x48C0 US_ALU_RGB_INST_0
			0x48C4 US_ALU_RGB_INST_1
			0x48C8 US_ALU_RGB_INST_2
			0x48CC US_ALU_RGB_INST_3
			0x48D0 US_ALU_RGB_INST_4
			0x48D4 US_ALU_RGB_INST_5
			0x48D8 US_ALU_RGB_INST_6
			0x48DC US_ALU_RGB_INST_7
			0x48E0 US_ALU_RGB_INST_8
			0x48E4 US_ALU_RGB_INST_9
			0x48E8 US_ALU_RGB_INST_10
			0x48EC US_ALU_RGB_INST_11
			0x48F0 US_ALU_RGB_INST_12
			0x48F4 US_ALU_RGB_INST_13
			0x48F8 US_ALU_RGB_INST_14
			0x48FC US_ALU_RGB_INST_15
			0x4900 US_ALU_RGB_INST_16
			0x4904 US_ALU_RGB_INST_17
			0x4908 US_ALU_RGB_INST_18
			0x490C US_ALU_RGB_INST_19
			0x4910 US_ALU_RGB_INST_20
			0x4914 US_ALU_RGB_INST_21
			0x4918 US_ALU_RGB_INST_22
			0x491C US_ALU_RGB_INST_23
			0x4920 US_ALU_RGB_INST_24
			0x4924 US_ALU_RGB_INST_25
			0x4928 US_ALU_RGB_INST_26
			0x492C US_ALU_RGB_INST_27
			0x4930 US_ALU_RGB_INST_28
			0x4934 US_ALU_RGB_INST_29
			0x4938 US_ALU_RGB_INST_30
			0x493C US_ALU_RGB_INST_31
			0x4940 US_ALU_RGB_INST_32
			0x4944 US_ALU_RGB_INST_33
			0x4948 US_ALU_RGB_INST_34
			0x494C US_ALU_RGB_INST_35
			0x4950 US_ALU_RGB_INST_36
			0x4954 US_ALU_RGB_INST_37
			0x4958 US_ALU_RGB_INST_38
			0x495C US_ALU_RGB_INST_39
			0x4960 US_ALU_RGB_INST_40
			0x4964 US_ALU_RGB_INST_41
			0x4968 US_ALU_RGB_INST_42
			0x496C US_ALU_RGB_INST_43
			0x4970 US_ALU_RGB_INST_44
			0x4974 US_ALU_RGB_INST_45
			0x4978 US_ALU_RGB_INST_46
			0x497C US_ALU_RGB_INST_47
			0x4980 US_ALU_RGB_INST_48
			0x4984 US_ALU_RGB_INST_49
			0x4988 US_ALU_RGB_INST_50
			0x498C US_ALU_RGB_INST_51
			0x4990 US_ALU_RGB_INST_52
			0x4994 US_ALU_RGB_INST_53
			0x4998 US_ALU_RGB_INST_54
			0x499C US_ALU_RGB_INST_55
			0x49A0 US_ALU_RGB_INST_56
			0x49A4 US_ALU_RGB_INST_57
			0x49A8 US_ALU_RGB_INST_58
			0x49AC US_ALU_RGB_INST_59
			0x49B0 US_ALU_RGB_INST_60
			0x49B4 US_ALU_RGB_INST_61
			0x49B8 US_ALU_RGB_INST_62
			0x49BC US_ALU_RGB_INST_63
			0x49C0 US_ALU_ALPHA_INST_0
			0x49C4 US_ALU_ALPHA_INST_1
			0x49C8 US_ALU_ALPHA_INST_2
			0x49CC US_ALU_ALPHA_INST_3
			0x49D0 US_ALU_ALPHA_INST_4
			0x49D4 US_ALU_ALPHA_INST_5
			0x49D8 US_ALU_ALPHA_INST_6
			0x49DC US_ALU_ALPHA_INST_7
			0x49E0 US_ALU_ALPHA_INST_8
			0x49E4 US_ALU_ALPHA_INST_9
			0x49E8 US_ALU_ALPHA_INST_10
			0x49EC US_ALU_ALPHA_INST_11
			0x49F0 US_ALU_ALPHA_INST_12
			0x49F4 US_ALU_ALPHA_INST_13
			0x49F8 US_ALU_ALPHA_INST_14
			0x49FC US_ALU_ALPHA_INST_15
			0x4A00 US_ALU_ALPHA_INST_16
			0x4A04 US_ALU_ALPHA_INST_17
			0x4A08 US_ALU_ALPHA_INST_18
			0x4A0C US_ALU_ALPHA_INST_19
			0x4A10 US_ALU_ALPHA_INST_20
			0x4A14 US_ALU_ALPHA_INST_21
			0x4A18 US_ALU_ALPHA_INST_22
			0x4A1C US_ALU_ALPHA_INST_23
			0x4A20 US_ALU_ALPHA_INST_24
			0x4A24 US_ALU_ALPHA_INST_25
			0x4A28 US_ALU_ALPHA_INST_26
			0x4A2C US_ALU_ALPHA_INST_27
			0x4A30 US_ALU_ALPHA_INST_28
			0x4A34 US_ALU_ALPHA_INST_29
			0x4A38 US_ALU_ALPHA_INST_30
			0x4A3C US_ALU_ALPHA_INST_31
			0x4A40 US_ALU_ALPHA_INST_32
			0x4A44 US_ALU_ALPHA_INST_33
			0x4A48 US_ALU_ALPHA_INST_34
			0x4A4C US_ALU_ALPHA_INST_35
			0x4A50 US_ALU_ALPHA_INST_36
			0x4A54 US_ALU_ALPHA_INST_37
			0x4A58 US_ALU_ALPHA_INST_38
			0x4A5C US_ALU_ALPHA_INST_39
			0x4A60 US_ALU_ALPHA_INST_40
			0x4A64 US_ALU_ALPHA_INST_41
			0x4A68 US_ALU_ALPHA_INST_42
			0x4A6C US_ALU_ALPHA_INST_43
			0x4A70 US_ALU_ALPHA_INST_44
			0x4A74 US_ALU_ALPHA_INST_45
			0x4A78 US_ALU_ALPHA_INST_46
			0x4A7C US_ALU_ALPHA_INST_47
			0x4A80 US_ALU_ALPHA_INST_48
			0x4A84 US_ALU_ALPHA_INST_49
			0x4A88 US_ALU_ALPHA_INST_50
			0x4A8C US_ALU_ALPHA_INST_51
			0x4A90 US_ALU_ALPHA_INST_52
			0x4A94 US_ALU_ALPHA_INST_53
			0x4A98 US_ALU_ALPHA_INST_54
			0x4A9C US_ALU_ALPHA_INST_55
			0x4AA0 US_ALU_ALPHA_INST_56
			0x4AA4 US_ALU_ALPHA_INST_57
			0x4AA8 US_ALU_ALPHA_INST_58
			0x4AAC US_ALU_ALPHA_INST_59
			0x4AB0 US_ALU_ALPHA_INST_60
			0x4AB4 US_ALU_ALPHA_INST_61
			0x4AB8 US_ALU_ALPHA_INST_62
			0x4ABC US_ALU_ALPHA_INST_63
			0x4BC0 FG_FOG_BLEND
			0x4BC4 FG_FOG_FACTOR
			0x4BC8 FG_FOG_COLOR_R
			0x4BCC FG_FOG_COLOR_G
			0x4BD0 FG_FOG_COLOR_B
			0x4BD4 FG_ALPHA_FUNC
			0x4BD8 FG_DEPTH_SRC
			0x4C00 US_ALU_CONST_R_0
			0x4C04 US_ALU_CONST_G_0
			0x4C08 US_ALU_CONST_B_0
			0x4C0C US_ALU_CONST_A_0
			0x4C10 US_ALU_CONST_R_1
			0x4C14 US_ALU_CONST_G_1
			0x4C18 US_ALU_CONST_B_1
			0x4C1C US_ALU_CONST_A_1
			0x4C20 US_ALU_CONST_R_2
			0x4C24 US_ALU_CONST_G_2
			0x4C28 US_ALU_CONST_B_2
			0x4C2C US_ALU_CONST_A_2
			0x4C30 US_ALU_CONST_R_3
			0x4C34 US_ALU_CONST_G_3
			0x4C38 US_ALU_CONST_B_3
			0x4C3C US_ALU_CONST_A_3
			0x4C40 US_ALU_CONST_R_4
			0x4C44 US_ALU_CONST_G_4
			0x4C48 US_ALU_CONST_B_4
			0x4C4C US_ALU_CONST_A_4
			0x4C50 US_ALU_CONST_R_5
			0x4C54 US_ALU_CONST_G_5
			0x4C58 US_ALU_CONST_B_5
			0x4C5C US_ALU_CONST_A_5
			0x4C60 US_ALU_CONST_R_6
			0x4C64 US_ALU_CONST_G_6
			0x4C68 US_ALU_CONST_B_6
			0x4C6C US_ALU_CONST_A_6
			0x4C70 US_ALU_CONST_R_7
			0x4C74 US_ALU_CONST_G_7
			0x4C78 US_ALU_CONST_B_7
			0x4C7C US_ALU_CONST_A_7
			0x4C80 US_ALU_CONST_R_8
			0x4C84 US_ALU_CONST_G_8
			0x4C88 US_ALU_CONST_B_8
			0x4C8C US_ALU_CONST_A_8
			0x4C90 US_ALU_CONST_R_9
			0x4C94 US_ALU_CONST_G_9
			0x4C98 US_ALU_CONST_B_9
			0x4C9C US_ALU_CONST_A_9
			0x4CA0 US_ALU_CONST_R_10
			0x4CA4 US_ALU_CONST_G_10
			0x4CA8 US_ALU_CONST_B_10
			0x4CAC US_ALU_CONST_A_10
			0x4CB0 US_ALU_CONST_R_11
			0x4CB4 US_ALU_CONST_G_11
			0x4CB8 US_ALU_CONST_B_11
			0x4CBC US_ALU_CONST_A_11
			0x4CC0 US_ALU_CONST_R_12
			0x4CC4 US_ALU_CONST_G_12
			0x4CC8 US_ALU_CONST_B_12
			0x4CCC US_ALU_CONST_A_12
			0x4CD0 US_ALU_CONST_R_13
			0x4CD4 US_ALU_CONST_G_13
			0x4CD8 US_ALU_CONST_B_13
			0x4CDC US_ALU_CONST_A_13
			0x4CE0 US_ALU_CONST_R_14
			0x4CE4 US_ALU_CONST_G_14
			0x4CE8 US_ALU_CONST_B_14
			0x4CEC US_ALU_CONST_A_14
			0x4CF0 US_ALU_CONST_R_15
			0x4CF4 US_ALU_CONST_G_15
			0x4CF8 US_ALU_CONST_B_15
			0x4CFC US_ALU_CONST_A_15
			0x4D00 US_ALU_CONST_R_16
			0x4D04 US_ALU_CONST_G_16
			0x4D08 US_ALU_CONST_B_16
			0x4D0C US_ALU_CONST_A_16
			0x4D10 US_ALU_CONST_R_17
			0x4D14 US_ALU_CONST_G_17
			0x4D18 US_ALU_CONST_B_17
			0x4D1C US_ALU_CONST_A_17
			0x4D20 US_ALU_CONST_R_18
			0x4D24 US_ALU_CONST_G_18
			0x4D28 US_ALU_CONST_B_18
			0x4D2C US_ALU_CONST_A_18
			0x4D30 US_ALU_CONST_R_19
			0x4D34 US_ALU_CONST_G_19
			0x4D38 US_ALU_CONST_B_19
			0x4D3C US_ALU_CONST_A_19
			0x4D40 US_ALU_CONST_R_20
			0x4D44 US_ALU_CONST_G_20
			0x4D48 US_ALU_CONST_B_20
			0x4D4C US_ALU_CONST_A_20
			0x4D50 US_ALU_CONST_R_21
			0x4D54 US_ALU_CONST_G_21
			0x4D58 US_ALU_CONST_B_21
			0x4D5C US_ALU_CONST_A_21
			0x4D60 US_ALU_CONST_R_22
			0x4D64 US_ALU_CONST_G_22
			0x4D68 US_ALU_CONST_B_22
			0x4D6C US_ALU_CONST_A_22
			0x4D70 US_ALU_CONST_R_23
			0x4D74 US_ALU_CONST_G_23
			0x4D78 US_ALU_CONST_B_23
			0x4D7C US_ALU_CONST_A_23
			0x4D80 US_ALU_CONST_R_24
			0x4D84 US_ALU_CONST_G_24
			0x4D88 US_ALU_CONST_B_24
			0x4D8C US_ALU_CONST_A_24
			0x4D90 US_ALU_CONST_R_25
			0x4D94 US_ALU_CONST_G_25
			0x4D98 US_ALU_CONST_B_25
			0x4D9C US_ALU_CONST_A_25
			0x4DA0 US_ALU_CONST_R_26
			0x4DA4 US_ALU_CONST_G_26
			0x4DA8 US_ALU_CONST_B_26
			0x4DAC US_ALU_CONST_A_26
			0x4DB0 US_ALU_CONST_R_27
			0x4DB4 US_ALU_CONST_G_27
			0x4DB8 US_ALU_CONST_B_27
			0x4DBC US_ALU_CONST_A_27
			0x4DC0 US_ALU_CONST_R_28
			0x4DC4 US_ALU_CONST_G_28
			0x4DC8 US_ALU_CONST_B_28
			0x4DCC US_ALU_CONST_A_28
			0x4DD0 US_ALU_CONST_R_29
			0x4DD4 US_ALU_CONST_G_29
			0x4DD8 US_ALU_CONST_B_29
			0x4DDC US_ALU_CONST_A_29
			0x4DE0 US_ALU_CONST_R_30
			0x4DE4 US_ALU_CONST_G_30
			0x4DE8 US_ALU_CONST_B_30
			0x4DEC US_ALU_CONST_A_30
			0x4DF0 US_ALU_CONST_R_31
			0x4DF4 US_ALU_CONST_G_31
			0x4DF8 US_ALU_CONST_B_31
			0x4DFC US_ALU_CONST_A_31
			0x4E04 RB3D_BLENDCNTL_R3
			0x4E08 RB3D_ABLENDCNTL_R3
			0x4E0C RB3D_COLOR_CHANNEL_MASK
			0x4E10 RB3D_CONSTANT_COLOR
			0x4E14 RB3D_COLOR_CLEAR_VALUE
			0x4E18 RB3D_ROPCNTL_R3
			0x4E1C RB3D_CLRCMP_FLIPE_R3
			0x4E20 RB3D_CLRCMP_CLR_R3
			0x4E24 RB3D_CLRCMP_MSK_R3
			0x4E48 RB3D_DEBUG_CTL
			0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
			0x4E50 RB3D_DITHER_CTL
			0x4E54 RB3D_CMASK_OFFSET0
			0x4E58 RB3D_CMASK_OFFSET1
			0x4E5C RB3D_CMASK_OFFSET2
			0x4E60 RB3D_CMASK_OFFSET3
			0x4E64 RB3D_CMASK_PITCH0
			0x4E68 RB3D_CMASK_PITCH1
			0x4E6C RB3D_CMASK_PITCH2
			0x4E70 RB3D_CMASK_PITCH3
			0x4E74 RB3D_CMASK_WRINDEX
			0x4E78 RB3D_CMASK_DWORD
			0x4E7C RB3D_CMASK_RDINDEX
			0x4E80 RB3D_AARESOLVE_OFFSET
			0x4E84 RB3D_AARESOLVE_PITCH
			0x4E88 RB3D_AARESOLVE_CTL
			0x4F04 ZB_ZSTENCILCNTL
			0x4F08 ZB_STENCILREFMASK
			0x4F14 ZB_ZTOP
			0x4F18 ZB_ZCACHE_CTLSTAT
			0x4F1C ZB_BW_CNTL
			0x4F28 ZB_DEPTHCLEARVALUE
			0x4F30 ZB_ZMASK_OFFSET
			0x4F34 ZB_ZMASK_PITCH
			0x4F38 ZB_ZMASK_WRINDEX
			0x4F3C ZB_ZMASK_DWORD
			0x4F40 ZB_ZMASK_RDINDEX
			0x4F44 ZB_HIZ_OFFSET
			0x4F48 ZB_HIZ_WRINDEX
			0x4F4C ZB_HIZ_DWORD
			0x4F50 ZB_HIZ_RDINDEX
			0x4F54 ZB_HIZ_PITCH
			0x4F58 ZB_ZPASS_DATA
			0x4F60 ZB_DEPTHXY_OFFSET

drivers/gpu/drm/radeon/rs600.c

+9 −0

Original line number	Original line	Diff line number	Diff line
	@@ -29,6 +29,8 @@
	#include "radeon_reg.h"		#include "radeon_reg.h"
	#include "radeon.h"		#include "radeon.h"

			#include "rs600_reg_safe.h"

	/* rs600 depends on : */		/* rs600 depends on : */
	void r100_hdp_reset(struct radeon_device *rdev);		void r100_hdp_reset(struct radeon_device *rdev);
	int r100_gui_wait_for_idle(struct radeon_device *rdev);		int r100_gui_wait_for_idle(struct radeon_device *rdev);
	@@ -409,3 +411,10 @@ void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
	((reg) & RS600_MC_ADDR_MASK));		((reg) & RS600_MC_ADDR_MASK));
	WREG32(RS600_MC_DATA, v);		WREG32(RS600_MC_DATA, v);
	}		}

			int rs600_init(struct radeon_device *rdev)
			{
			rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm;
			rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs600_reg_safe_bm);
			return 0;
			}

drivers/gpu/drm/radeon/rs690.c

+0 −65

Original line number	Original line	Diff line number	Diff line
	@@ -652,68 +652,3 @@ void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
	WREG32(RS690_MC_DATA, v);		WREG32(RS690_MC_DATA, v);
	WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);		WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
	}		}

	static const unsigned rs690_reg_safe_bm[219] = {
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0x17FF1FFF,0xFFFFFFFC,0xFFFFFFFF,0xFF30FFBF,
	0xFFFFFFF8,0xC3E6FFFF,0xFFFFF6DF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFF03F,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFEFCE,0xF00EBFFF,0x007C0000,
	0xF0000078,0xFF000009,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFF7FF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFC78,0xFFFFFFFF,0xFFFFFFFE,0xFFFFFFFF,
	0x38FF8F50,0xFFF88082,0xF000000C,0xFAE009FF,
	0x0000FFFF,0xFFFFFFFF,0xFFFFFFFF,0x00000000,
	0x00000000,0x0000C100,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0xFFFF0000,0xFFFFFFFF,0xFF80FFFF,
	0x00000000,0x00000000,0x00000000,0x00000000,
	0x0003FC01,0xFFFFFFF8,0xFE800B19,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
	};

	int rs690_init(struct radeon_device *rdev)
	{
	rdev->config.r300.reg_safe_bm = rs690_reg_safe_bm;
	rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs690_reg_safe_bm);
	return 0;
	}