Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3f1d896c authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915/chv: Enable aliasing PPGTT for CHV 



Enable aliasing PPGTT for CHV, but keep full PPGTT still disabled until
it gets enabled for BDW.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarRafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fd1ab8f4

drivers/gpu/drm/i915/i915_drv.h

+4 −3
Original line number Diff line number Diff line
@@ -1848,9 +1848,10 @@ struct drm_i915_cmd_table { 
#define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)



#define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 6)

#define HAS_ALIASING_PPGTT(dev)	(INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev))

#define HAS_PPGTT(dev)		(INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev) \

				 && !IS_BROADWELL(dev))

#define HAS_ALIASING_PPGTT(dev)	(INTEL_INFO(dev)->gen >= 6 && \

				 (!IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)))

#define HAS_PPGTT(dev)		(INTEL_INFO(dev)->gen >= 7 \

				 && !IS_GEN8(dev))

#define USES_PPGTT(dev)		intel_enable_ppgtt(dev, false)

#define USES_FULL_PPGTT(dev)	intel_enable_ppgtt(dev, true)