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Commit 3e2fbc7f authored by Shraddha Barke's avatar Shraddha Barke Committed by Greg Kroah-Hartman
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Staging: goldfish: goldfish_nand: Add DMA Support using dmam_alloc_coherent 



Function nand_setup_cmd_params has 2 goals-

-Initialize the cmd_params field so that it can be used to send and read
commands from the device.
-Get a bus address for the allocated memory to transfer to the device.

Replace the combination of devm_kzalloc and _pa() with dmam_alloc_coherent.
Coherent mapping guarantees that the device and CPU are in sync.

Signed-off-by: default avatarShraddha Barke <shraddha.6596@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d62f324b

drivers/staging/goldfish/goldfish_nand.c

+11 −9
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <linux/mutex.h>

#include <linux/goldfish.h>

#include <asm/div64.h>

#include <linux/dma-mapping.h>



#include "goldfish_nand_reg.h"
@@ -284,17 +285,18 @@ static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs) 
static int nand_setup_cmd_params(struct platform_device *pdev,

				 struct goldfish_nand *nand)

{

	u64 paddr;

	dma_addr_t dma_handle;

	unsigned char __iomem  *base = nand->base;



	nand->cmd_params = devm_kzalloc(&pdev->dev,

					sizeof(struct cmd_params), GFP_KERNEL);

	if (!nand->cmd_params)

		return -1;



	paddr = __pa(nand->cmd_params);

	writel((u32)(paddr >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);

	writel((u32)paddr, base + NAND_CMD_PARAMS_ADDR_LOW);

	nand->cmd_params = dmam_alloc_coherent(&pdev->dev,

					       sizeof(struct cmd_params),

					       &dma_handle, GFP_KERNEL);

	if (!nand->cmd_params) {

		dev_err(&pdev->dev, "allocate buffer failed\n");

		return -ENOMEM;

	}

	writel((u32)((u64)dma_handle >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);

	writel((u32)dma_handle, base + NAND_CMD_PARAMS_ADDR_LOW);

	return 0;

}