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Commit 3b94a891 authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar
Browse files

perf/x86/intel/uncore: Remove SBOX support for Broadwell server 



There was a report that on certain Broadwell-EP systems writing any bit of
the SBOX PMU initialization MSR would #GP at boot. This did not happen
on all systems. My test systems booted fine.

Considering both DE and EP may have such issues, this patch removes SBOX
support for all Broadwell platforms for now.

Reported-and-tested-by: default avatarMark van Dijk <mark@voidzero.net>
Signed-off-by: default avatarKan Liang <kan.liang@intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1464347540-5763-1-git-send-email-kan.liang@intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 71146051

arch/x86/events/intel/uncore_snbep.c

+0 −21
Original line number Diff line number Diff line
@@ -2868,27 +2868,10 @@ static struct intel_uncore_type bdx_uncore_cbox = { 
	.format_group		= &hswep_uncore_cbox_format_group,

};



static struct intel_uncore_type bdx_uncore_sbox = {

	.name			= "sbox",

	.num_counters		= 4,

	.num_boxes		= 4,

	.perf_ctr_bits		= 48,

	.event_ctl		= HSWEP_S0_MSR_PMON_CTL0,

	.perf_ctr		= HSWEP_S0_MSR_PMON_CTR0,

	.event_mask		= HSWEP_S_MSR_PMON_RAW_EVENT_MASK,

	.box_ctl		= HSWEP_S0_MSR_PMON_BOX_CTL,

	.msr_offset		= HSWEP_SBOX_MSR_OFFSET,

	.ops			= &hswep_uncore_sbox_msr_ops,

	.format_group		= &hswep_uncore_sbox_format_group,

};



#define BDX_MSR_UNCORE_SBOX	3



static struct intel_uncore_type *bdx_msr_uncores[] = {

	&bdx_uncore_ubox,

	&bdx_uncore_cbox,

	&hswep_uncore_pcu,

	&bdx_uncore_sbox,

	NULL,

};
@@ -2897,10 +2880,6 @@ void bdx_uncore_cpu_init(void) 
	if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)

		bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;

	uncore_msr_uncores = bdx_msr_uncores;



	/* BDX-DE doesn't have SBOX */

	if (boot_cpu_data.x86_model == 86)

		uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;

}



static struct intel_uncore_type bdx_uncore_ha = {