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Commit 3b6bb5b7 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Joerg Roedel
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iommu/ipmmu-vmsa: Restrict IOMMU Domain Geometry to 32-bit address space 



Currently, the IPMMU/VMSA driver supports 32-bit I/O Virtual Addresses
only, and thus sets io_pgtable_cfg.ias = 32.  However, it doesn't force
a 32-bit IOVA space through the IOMMU Domain Geometry.

Hence if a device (e.g. SYS-DMAC) rightfully configures a 40-bit DMA
mask, it will still be handed out a 40-bit IOVA, outside the 32-bit IOVA
space, leading to out-of-bounds accesses of the PGD when mapping the
IOVA.

Force a 32-bit IOMMU Domain Geometry to fix this.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarRobin Murphy <robin.murphy@arm.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent d5adbfcd

drivers/iommu/ipmmu-vmsa.c

+2 −0
Original line number Diff line number Diff line
@@ -313,6 +313,8 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) 
	domain->cfg.ias = 32;

	domain->cfg.oas = 40;

	domain->cfg.tlb = &ipmmu_gather_ops;

	domain->io_domain.geometry.aperture_end = DMA_BIT_MASK(32);

	domain->io_domain.geometry.force_aperture = true;

	/*

	 * TODO: Add support for coherent walk through CCI with DVM and remove

	 * cache handling. For now, delegate it to the io-pgtable code.