Loading arch/sh/boards/renesas/r7780rp/io.c +0 −4 Original line number Diff line number Diff line Loading @@ -156,8 +156,6 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count) while (count--) *buf++ = *p; flush_dcache_all(); } void r7780rp_insl(unsigned long port, void *dst, unsigned long count) Loading Loading @@ -204,8 +202,6 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count) while (count--) *p = *buf++; flush_dcache_all(); } void r7780rp_outsl(unsigned long port, const void *src, unsigned long count) Loading arch/sh/kernel/io_generic.c +0 −3 Original line number Diff line number Diff line Loading @@ -14,7 +14,6 @@ #include <linux/module.h> #include <linux/io.h> #include <asm/machvec.h> #include <asm/cacheflush.h> #ifdef CONFIG_CPU_SH3 /* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a Loading Loading @@ -96,7 +95,6 @@ void generic_insw(unsigned long port, void *dst, unsigned long count) while (count--) *buf++ = *port_addr; flush_dcache_all(); dummy_read(); } Loading Loading @@ -171,7 +169,6 @@ void generic_outsw(unsigned long port, const void *src, unsigned long count) while (count--) *port_addr = *buf++; flush_dcache_all(); dummy_read(); } Loading arch/sh/mm/cache-sh4.c +1 −11 Original line number Diff line number Diff line Loading @@ -237,20 +237,10 @@ static inline void flush_cache_4096(unsigned long start, /* * Write back & invalidate the D-cache of the page. * (To avoid "alias" issues) * * This uses a lazy write-back on UP, which is explicitly * disabled on SMP. */ void flush_dcache_page(struct page *page) { #ifndef CONFIG_SMP struct address_space *mapping = page_mapping(page); if (mapping && !mapping_mapped(mapping)) set_bit(PG_dcache_dirty, &page->flags); else #endif { if (test_bit(PG_mapped, &page->flags)) { unsigned long phys = PHYSADDR(page_address(page)); unsigned long addr = CACHE_OC_ADDRESS_ARRAY; int i, n; Loading arch/sh/mm/cache-sh7705.c +3 −6 Original line number Diff line number Diff line Loading @@ -3,11 +3,11 @@ * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2004 Alex Song * Copyright (C) 2006 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * */ #include <linux/init.h> #include <linux/mman.h> Loading Loading @@ -51,6 +51,7 @@ static inline void cache_wback_all(void) if ((data & v) == v) ctrl_outl(data & ~v, addr); } addrstart += current_cpu_data.dcache.way_incr; Loading Loading @@ -127,11 +128,7 @@ static void __flush_dcache_page(unsigned long phys) */ void flush_dcache_page(struct page *page) { struct address_space *mapping = page_mapping(page); if (mapping && !mapping_mapped(mapping)) set_bit(PG_dcache_dirty, &page->flags); else if (test_bit(PG_mapped, &page->flags)) __flush_dcache_page(PHYSADDR(page_address(page))); } Loading arch/sh/mm/pg-sh4.c +22 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ extern struct mutex p3map_mutex[]; */ void clear_user_page(void *to, unsigned long address, struct page *page) { __set_bit(PG_mapped, &page->flags); if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) clear_page(to); else { Loading Loading @@ -58,6 +59,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) void copy_user_page(void *to, void *from, unsigned long address, struct page *page) { __set_bit(PG_mapped, &page->flags); if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) copy_page(to, from); else { Loading @@ -82,3 +84,23 @@ void copy_user_page(void *to, void *from, unsigned long address, mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); } } /* * For SH-4, we have our own implementation for ptep_get_and_clear */ inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t pte = *ptep; pte_clear(mm, addr, ptep); if (!pte_not_present(pte)) { unsigned long pfn = pte_pfn(pte); if (pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); struct address_space *mapping = page_mapping(page); if (!mapping || !mapping_writably_mapped(mapping)) __clear_bit(PG_mapped, &page->flags); } } return pte; } Loading
arch/sh/boards/renesas/r7780rp/io.c +0 −4 Original line number Diff line number Diff line Loading @@ -156,8 +156,6 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count) while (count--) *buf++ = *p; flush_dcache_all(); } void r7780rp_insl(unsigned long port, void *dst, unsigned long count) Loading Loading @@ -204,8 +202,6 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count) while (count--) *p = *buf++; flush_dcache_all(); } void r7780rp_outsl(unsigned long port, const void *src, unsigned long count) Loading
arch/sh/kernel/io_generic.c +0 −3 Original line number Diff line number Diff line Loading @@ -14,7 +14,6 @@ #include <linux/module.h> #include <linux/io.h> #include <asm/machvec.h> #include <asm/cacheflush.h> #ifdef CONFIG_CPU_SH3 /* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a Loading Loading @@ -96,7 +95,6 @@ void generic_insw(unsigned long port, void *dst, unsigned long count) while (count--) *buf++ = *port_addr; flush_dcache_all(); dummy_read(); } Loading Loading @@ -171,7 +169,6 @@ void generic_outsw(unsigned long port, const void *src, unsigned long count) while (count--) *port_addr = *buf++; flush_dcache_all(); dummy_read(); } Loading
arch/sh/mm/cache-sh4.c +1 −11 Original line number Diff line number Diff line Loading @@ -237,20 +237,10 @@ static inline void flush_cache_4096(unsigned long start, /* * Write back & invalidate the D-cache of the page. * (To avoid "alias" issues) * * This uses a lazy write-back on UP, which is explicitly * disabled on SMP. */ void flush_dcache_page(struct page *page) { #ifndef CONFIG_SMP struct address_space *mapping = page_mapping(page); if (mapping && !mapping_mapped(mapping)) set_bit(PG_dcache_dirty, &page->flags); else #endif { if (test_bit(PG_mapped, &page->flags)) { unsigned long phys = PHYSADDR(page_address(page)); unsigned long addr = CACHE_OC_ADDRESS_ARRAY; int i, n; Loading
arch/sh/mm/cache-sh7705.c +3 −6 Original line number Diff line number Diff line Loading @@ -3,11 +3,11 @@ * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2004 Alex Song * Copyright (C) 2006 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * */ #include <linux/init.h> #include <linux/mman.h> Loading Loading @@ -51,6 +51,7 @@ static inline void cache_wback_all(void) if ((data & v) == v) ctrl_outl(data & ~v, addr); } addrstart += current_cpu_data.dcache.way_incr; Loading Loading @@ -127,11 +128,7 @@ static void __flush_dcache_page(unsigned long phys) */ void flush_dcache_page(struct page *page) { struct address_space *mapping = page_mapping(page); if (mapping && !mapping_mapped(mapping)) set_bit(PG_dcache_dirty, &page->flags); else if (test_bit(PG_mapped, &page->flags)) __flush_dcache_page(PHYSADDR(page_address(page))); } Loading
arch/sh/mm/pg-sh4.c +22 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ extern struct mutex p3map_mutex[]; */ void clear_user_page(void *to, unsigned long address, struct page *page) { __set_bit(PG_mapped, &page->flags); if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) clear_page(to); else { Loading Loading @@ -58,6 +59,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) void copy_user_page(void *to, void *from, unsigned long address, struct page *page) { __set_bit(PG_mapped, &page->flags); if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) copy_page(to, from); else { Loading @@ -82,3 +84,23 @@ void copy_user_page(void *to, void *from, unsigned long address, mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); } } /* * For SH-4, we have our own implementation for ptep_get_and_clear */ inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t pte = *ptep; pte_clear(mm, addr, ptep); if (!pte_not_present(pte)) { unsigned long pfn = pte_pfn(pte); if (pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); struct address_space *mapping = page_mapping(page); if (!mapping || !mapping_writably_mapped(mapping)) __clear_bit(PG_mapped, &page->flags); } } return pte; }