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Commit 393c1a34 authored by Philip Rakity's avatar Philip Rakity Committed by Chris Ball
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mmc: sdhci: Add pre and post reset processing for chip specific reset



Marvell pxa controllers have private registers that may need to be
modified before and after a reset is done.

For example, the SD reset operation, RESET_ALL, will reset the private
registers to their default state.  This will cause the clock adjustment
registers that may have been programmed to have incorrect values.

RESET_DATA sometimes needs to be delayed before the reset is done
(depending on SoC) to enable any transactions being handled by the
SDIO card to be completed.  Needed in pre SD 3.0 silicon to handle
clock gating.

Implement hooks to allow this to happen.

Signed-off-by: default avatarPhilip Rakity <prakity@marvell.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 4b01681c
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+6 −0
Original line number Diff line number Diff line
@@ -156,6 +156,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
	if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
		ier = sdhci_readl(host, SDHCI_INT_ENABLE);

	if (host->ops->platform_reset_enter)
		host->ops->platform_reset_enter(host, mask);

	sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);

	if (mask & SDHCI_RESET_ALL)
@@ -176,6 +179,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
		mdelay(1);
	}

	if (host->ops->platform_reset_exit)
		host->ops->platform_reset_exit(host, mask);

	if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
		sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier);
}
+2 −0
Original line number Diff line number Diff line
@@ -229,6 +229,8 @@ struct sdhci_ops {
	void (*platform_send_init_74_clocks)(struct sdhci_host *host,
					     u8 power_mode);
	unsigned int    (*get_ro)(struct sdhci_host *host);
	void	(*platform_reset_enter)(struct sdhci_host *host, u8 mask);
	void	(*platform_reset_exit)(struct sdhci_host *host, u8 mask);
};

#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS