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Commit 3827d10e authored by Ondrej Zary's avatar Ondrej Zary Committed by Paul Mundt
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s3fb: fix 15/16bpp modes with over 115MHz pixclocks on 86C365 Trio3D 



Enable pixel multiplexing in 15/16bpp modes when pixclock is over 115MHz
on Trio3D (86C365) cards to fix artifacts on the left side of screen.

Signed-off-by: default avatarOndrej Zary <linux@rainbow-software.org>
Acked-by: default avatarOndrej Zajicek <santiago@crfreenet.org>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 5694f9ce

drivers/video/s3fb.c

+18 −0
Original line number Diff line number Diff line
@@ -675,6 +675,15 @@ static int s3fb_set_par(struct fb_info *info) 
				svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0);

			else

				svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);

		} else if (par->chip == CHIP_365_TRIO3D) {

			svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);

			if (info->var.pixclock > 8695) {

				svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);

				hmul = 2;

			} else {

				svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0);

				multiplex = 1;

			}

		} else {

			svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);

			svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);
@@ -691,6 +700,15 @@ static int s3fb_set_par(struct fb_info *info) 
				svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0);

			else

				svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);

		} else if (par->chip == CHIP_365_TRIO3D) {

			svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);

			if (info->var.pixclock > 8695) {

				svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);

				hmul = 2;

			} else {

				svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0);

				multiplex = 1;

			}

		} else {

			svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);

			svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);