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Commit 3789d59c authored by Mohammed Shafi Shajakhan's avatar Mohammed Shafi Shajakhan Committed by John W. Linville
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ath9k_hw: Fix enabling of MCI and RTT



tested in AR9462 Rev:2, both hardware capability flag are set

Signed-off-by: default avatarMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 138f07ed
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+11 −2
Original line number Diff line number Diff line
@@ -2390,8 +2390,17 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
		if (AR_SREV_9485_OR_LATER(ah))
			ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
	}
	if (AR_SREV_9462(ah))
		pCap->hw_caps |= ATH9K_HW_CAP_RTT | ATH9K_HW_CAP_MCI;

	if (AR_SREV_9462(ah)) {

		if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE))
			pCap->hw_caps |= ATH9K_HW_CAP_MCI;

		if (AR_SREV_9462_20(ah))
			pCap->hw_caps |= ATH9K_HW_CAP_RTT;

	}


	return 0;
}
+1 −0
Original line number Diff line number Diff line
@@ -1151,6 +1151,7 @@ enum {
#define AR_INTR_PRIO_ASYNC_ENABLE (AR_SREV_9340(ah) ? 0x4094 : 0x40d4)
#define AR_ENT_OTP		  0x40d8
#define AR_ENT_OTP_CHAIN2_DISABLE               0x00020000
#define AR_ENT_OTP_49GHZ_DISABLE		0x00100000
#define AR_ENT_OTP_MIN_PKT_SIZE_DISABLE		0x00800000

#define AR_CH0_BB_DPLL1		 0x16180