Loading drivers/net/skge.c +20 −8 Original line number Diff line number Diff line Loading @@ -1804,6 +1804,25 @@ static void yukon_mac_init(struct skge_hw *hw, int port) skge_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); } /* Go into power down mode */ static void yukon_suspend(struct skge_hw *hw, int port) { u16 ctrl; ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); ctrl |= PHY_M_PC_POL_R_DIS; gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); ctrl |= PHY_CT_RESET; gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); /* switch IEEE compatible power down mode on */ ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); ctrl |= PHY_CT_PDOWN; gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); } static void yukon_stop(struct skge_port *skge) { struct skge_hw *hw = skge->hw; Loading @@ -1817,14 +1836,7 @@ static void yukon_stop(struct skge_port *skge) & ~(GM_GPCR_TX_ENA|GM_GPCR_RX_ENA)); gma_read16(hw, port, GM_GP_CTRL); if (hw->chip_id == CHIP_ID_YUKON_LITE && hw->chip_rev >= CHIP_REV_YU_LITE_A3) { u32 io = skge_read32(hw, B2_GP_IO); io |= GP_DIR_9 | GP_IO_9; skge_write32(hw, B2_GP_IO, io); skge_read32(hw, B2_GP_IO); } yukon_suspend(hw, port); /* set GPHY Control reset */ skge_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); Loading Loading
drivers/net/skge.c +20 −8 Original line number Diff line number Diff line Loading @@ -1804,6 +1804,25 @@ static void yukon_mac_init(struct skge_hw *hw, int port) skge_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); } /* Go into power down mode */ static void yukon_suspend(struct skge_hw *hw, int port) { u16 ctrl; ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); ctrl |= PHY_M_PC_POL_R_DIS; gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); ctrl |= PHY_CT_RESET; gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); /* switch IEEE compatible power down mode on */ ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); ctrl |= PHY_CT_PDOWN; gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); } static void yukon_stop(struct skge_port *skge) { struct skge_hw *hw = skge->hw; Loading @@ -1817,14 +1836,7 @@ static void yukon_stop(struct skge_port *skge) & ~(GM_GPCR_TX_ENA|GM_GPCR_RX_ENA)); gma_read16(hw, port, GM_GP_CTRL); if (hw->chip_id == CHIP_ID_YUKON_LITE && hw->chip_rev >= CHIP_REV_YU_LITE_A3) { u32 io = skge_read32(hw, B2_GP_IO); io |= GP_DIR_9 | GP_IO_9; skge_write32(hw, B2_GP_IO, io); skge_read32(hw, B2_GP_IO); } yukon_suspend(hw, port); /* set GPHY Control reset */ skge_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); Loading