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Commit 3495e295 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Stephen Boyd
Browse files

clk: actions: Add common clock driver support 



Add support for Actions Semi common clock driver with generic structures
and interface functions.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 06d42212

drivers/clk/Kconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -238,6 +238,7 @@ config COMMON_CLK_VC5 
	  This driver supports the IDT VersaClock 5 and VersaClock 6

	  This driver supports the IDT VersaClock 5 and VersaClock 6

	  programmable clock generators.

	  programmable clock generators.





source "drivers/clk/actions/Kconfig"

source "drivers/clk/bcm/Kconfig"

source "drivers/clk/bcm/Kconfig"

source "drivers/clk/hisilicon/Kconfig"

source "drivers/clk/hisilicon/Kconfig"

source "drivers/clk/imgtec/Kconfig"

source "drivers/clk/imgtec/Kconfig"

drivers/clk/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -56,6 +56,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o 
obj-$(CONFIG_COMMON_CLK_XGENE)		+= clk-xgene.o

obj-$(CONFIG_COMMON_CLK_XGENE)		+= clk-xgene.o





# please keep this section sorted lexicographically by directory path name

# please keep this section sorted lexicographically by directory path name

obj-y					+= actions/

obj-$(CONFIG_COMMON_CLK_AT91)		+= at91/

obj-$(CONFIG_COMMON_CLK_AT91)		+= at91/

obj-$(CONFIG_ARCH_ARTPEC)		+= axis/

obj-$(CONFIG_ARCH_ARTPEC)		+= axis/

obj-$(CONFIG_ARC_PLAT_AXS10X)		+= axs10x/

obj-$(CONFIG_ARC_PLAT_AXS10X)		+= axs10x/

drivers/clk/actions/Kconfig

0 → 100644
+4 −0
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config CLK_ACTIONS

	bool "Clock driver for Actions Semi SoCs"

	depends on ARCH_ACTIONS || COMPILE_TEST

	default ARCH_ACTIONS

drivers/clk/actions/Makefile

0 → 100644
+3 −0
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obj-$(CONFIG_CLK_ACTIONS)	+= clk-owl.o



clk-owl-y			+= owl-common.o

drivers/clk/actions/owl-common.c

0 → 100644
+89 −0
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// SPDX-License-Identifier: GPL-2.0+

//

// OWL common clock driver

//

// Copyright (c) 2014 Actions Semi Inc.

// Author: David Liu <liuwei@actions-semi.com>

//

// Copyright (c) 2018 Linaro Ltd.

// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



#include <linux/of_address.h>

#include <linux/of_platform.h>

#include <linux/platform_device.h>

#include <linux/regmap.h>



#include "owl-common.h"



static const struct regmap_config owl_regmap_config = {

	.reg_bits	= 32,

	.reg_stride	= 4,

	.val_bits	= 32,

	.max_register	= 0x00cc,

	.fast_io	= true,

};



static void owl_clk_set_regmap(const struct owl_clk_desc *desc,

			 struct regmap *regmap)

{

	int i;

	struct owl_clk_common *clks;



	for (i = 0; i < desc->num_clks; i++) {

		clks = desc->clks[i];

		if (!clks)

			continue;



		clks->regmap = regmap;

	}

}



int owl_clk_regmap_init(struct platform_device *pdev,

			 const struct owl_clk_desc *desc)

{

	void __iomem *base;

	struct regmap *regmap;

	struct resource *res;



	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	base = devm_ioremap_resource(&pdev->dev, res);

	if (IS_ERR(base))

		return PTR_ERR(base);



	regmap = devm_regmap_init_mmio(&pdev->dev, base, &owl_regmap_config);

	if (IS_ERR(regmap)) {

		pr_err("failed to init regmap\n");

		return PTR_ERR(regmap);

	}



	owl_clk_set_regmap(desc, regmap);



	return 0;

}



int owl_clk_probe(struct device *dev, struct clk_hw_onecell_data *hw_clks)

{

	int i, ret;

	struct clk_hw *hw;



	for (i = 0; i < hw_clks->num; i++) {



		hw = hw_clks->hws[i];



		if (IS_ERR_OR_NULL(hw))

			continue;



		ret = devm_clk_hw_register(dev, hw);

		if (ret) {

			dev_err(dev, "Couldn't register clock %d - %s\n",

				i, hw->init->name);

			return ret;

		}

	}



	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_clks);

	if (ret)

		dev_err(dev, "Failed to add clock provider\n");



	return ret;

}