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Commit 3490ea5d authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
Browse files

drm/i915: Treat crtc->mode.clock == 0 as disabled 



Prevent a divide-by-zero by consistently treating an 'active' CRTC
without a mode set as actually disabled.

This looks to have been first introduced with

commit 24929352
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon Jul 2 20:28:59 2012 +0200

    drm/i915: read out the modeset hw state at load and resume time

but then combined with

commit b0a2658a
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Dec 18 09:37:54 2012 +0100

    drm/i915: don't disable disconnected outputs

it finally started oopsing.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reported-and-tested-by: default avatarAlexey Zaytsev <alexey.zaytsev@gmail.com>
Tested-by: default avatarSedat Dilek <sedat.dilek@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 48e85834

drivers/gpu/drm/i915/intel_pm.c

+16 −9
Original line number Diff line number Diff line
@@ -44,6 +44,14 @@ 
 * i915.i915_enable_fbc parameter

 */



static bool intel_crtc_active(struct drm_crtc *crtc)

{

	/* Be paranoid as we can arrive here with only partial

	 * state retrieved from the hardware during setup.

	 */

	return to_intel_crtc(crtc)->active && crtc->fb && crtc->mode.clock;

}



static void i8xx_disable_fbc(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -405,9 +413,8 @@ void intel_update_fbc(struct drm_device *dev) 
	 *   - going to an unsupported config (interlace, pixel multiply, etc.)

	 */

	list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {

		if (to_intel_crtc(tmp_crtc)->active &&

		    !to_intel_crtc(tmp_crtc)->primary_disabled &&

		    tmp_crtc->fb) {

		if (intel_crtc_active(tmp_crtc) &&

		    !to_intel_crtc(tmp_crtc)->primary_disabled) {

			if (crtc) {

				DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");

				dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
@@ -992,7 +999,7 @@ static struct drm_crtc *single_enabled_crtc(struct drm_device *dev) 
	struct drm_crtc *crtc, *enabled = NULL;



	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

		if (to_intel_crtc(crtc)->active && crtc->fb) {

		if (intel_crtc_active(crtc)) {

			if (enabled)

				return NULL;

			enabled = crtc;
@@ -1086,7 +1093,7 @@ static bool g4x_compute_wm0(struct drm_device *dev, 
	int entries, tlb_miss;



	crtc = intel_get_crtc_for_plane(dev, plane);

	if (crtc->fb == NULL || !to_intel_crtc(crtc)->active) {

	if (!intel_crtc_active(crtc)) {

		*cursor_wm = cursor->guard_size;

		*plane_wm = display->guard_size;

		return false;
@@ -1215,7 +1222,7 @@ static bool vlv_compute_drain_latency(struct drm_device *dev, 
	int entries;



	crtc = intel_get_crtc_for_plane(dev, plane);

	if (crtc->fb == NULL || !to_intel_crtc(crtc)->active)

	if (!intel_crtc_active(crtc))

		return false;



	clock = crtc->mode.clock;	/* VESA DOT Clock */
@@ -1476,7 +1483,7 @@ static void i9xx_update_wm(struct drm_device *dev) 


	fifo_size = dev_priv->display.get_fifo_size(dev, 0);

	crtc = intel_get_crtc_for_plane(dev, 0);

	if (to_intel_crtc(crtc)->active && crtc->fb) {

	if (intel_crtc_active(crtc)) {

		int cpp = crtc->fb->bits_per_pixel / 8;

		if (IS_GEN2(dev))

			cpp = 4;
@@ -1490,7 +1497,7 @@ static void i9xx_update_wm(struct drm_device *dev) 


	fifo_size = dev_priv->display.get_fifo_size(dev, 1);

	crtc = intel_get_crtc_for_plane(dev, 1);

	if (to_intel_crtc(crtc)->active && crtc->fb) {

	if (intel_crtc_active(crtc)) {

		int cpp = crtc->fb->bits_per_pixel / 8;

		if (IS_GEN2(dev))

			cpp = 4;
@@ -2044,7 +2051,7 @@ sandybridge_compute_sprite_wm(struct drm_device *dev, int plane, 
	int entries, tlb_miss;



	crtc = intel_get_crtc_for_plane(dev, plane);

	if (crtc->fb == NULL || !to_intel_crtc(crtc)->active) {

	if (!intel_crtc_active(crtc)) {

		*sprite_wm = display->guard_size;

		return false;

	}