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Commit 341a1fc0 authored by Mike Frysinger's avatar Mike Frysinger
Browse files

Blackfin: scrub unused watchdog mmr masks 



The watchdog code doesn't need these, and the other parts had these
punted, so keep the global namespace clean.

Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 1915b6c0

arch/blackfin/mach-bf518/include/mach/defBF51x_base.h

+0 −34
Original line number Diff line number Diff line
@@ -756,40 +756,6 @@ 
#define IWR_DISABLE(x)	(0xFFFFFFFF ^ (1 << ((x)&0x1F))) 	/* Wakeup Disable Peripheral #x		*/





/* ********* WATCHDOG TIMER MASKS ******************** */



/* Watchdog Timer WDOG_CTL Register Masks */



#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */

#define WDEV_RESET 0x0000 /* generate reset event on roll over */

#define WDEV_NMI 0x0002 /* generate NMI event on roll over */

#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */

#define WDEV_NONE 0x0006 /* no event on roll over */

#define WDEN 0x0FF0 /* enable watchdog */

#define WDDIS 0x0AD0 /* disable watchdog */

#define WDRO 0x8000 /* watchdog rolled over latch */



/* depreciated WDOG_CTL Register Masks for legacy code */





#define ICTL WDEV

#define ENABLE_RESET WDEV_RESET

#define WDOG_RESET WDEV_RESET

#define ENABLE_NMI WDEV_NMI

#define WDOG_NMI WDEV_NMI

#define ENABLE_GPI WDEV_GPI

#define WDOG_GPI WDEV_GPI

#define DISABLE_EVT WDEV_NONE

#define WDOG_NONE WDEV_NONE



#define TMR_EN WDEN

#define TMR_DIS WDDIS

#define TRO WDRO

#define ICTL_P0 0x01

 #define ICTL_P1 0x02

#define TRO_P 0x0F





/* ************** UART CONTROLLER MASKS *************************/

/* UARTx_LCR Masks												*/

#define WLS(x)		(((x)-5) & 0x03)	/* Word Length Select */

arch/blackfin/mach-bf527/include/mach/defBF52x_base.h

+0 −34
Original line number Diff line number Diff line
@@ -757,40 +757,6 @@ 
#define IWR_DISABLE(x)	(0xFFFFFFFF ^ (1 << ((x)&0x1F))) 	/* Wakeup Disable Peripheral #x		*/





/* ********* WATCHDOG TIMER MASKS ******************** */



/* Watchdog Timer WDOG_CTL Register Masks */



#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */

#define WDEV_RESET 0x0000 /* generate reset event on roll over */

#define WDEV_NMI 0x0002 /* generate NMI event on roll over */

#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */

#define WDEV_NONE 0x0006 /* no event on roll over */

#define WDEN 0x0FF0 /* enable watchdog */

#define WDDIS 0x0AD0 /* disable watchdog */

#define WDRO 0x8000 /* watchdog rolled over latch */



/* depreciated WDOG_CTL Register Masks for legacy code */





#define ICTL WDEV

#define ENABLE_RESET WDEV_RESET

#define WDOG_RESET WDEV_RESET

#define ENABLE_NMI WDEV_NMI

#define WDOG_NMI WDEV_NMI

#define ENABLE_GPI WDEV_GPI

#define WDOG_GPI WDEV_GPI

#define DISABLE_EVT WDEV_NONE

#define WDOG_NONE WDEV_NONE



#define TMR_EN WDEN

#define TMR_DIS WDDIS

#define TRO WDRO

#define ICTL_P0 0x01

 #define ICTL_P1 0x02

#define TRO_P 0x0F





/* ************** UART CONTROLLER MASKS *************************/

/* UARTx_LCR Masks												*/

#define WLS(x)		(((x)-5) & 0x03)	/* Word Length Select */

arch/blackfin/mach-bf538/include/mach/defBF539.h

+0 −35
Original line number Diff line number Diff line
@@ -1609,41 +1609,6 @@ 
#endif /* _MISRA_RULES */





/* ********* WATCHDOG TIMER MASKS ******************** */

/* Watchdog Timer WDOG_CTL Register Masks */

#ifdef _MISRA_RULES

#define	WDEV(x)			(((x)<<1) & 0x0006u)	/* event generated on roll over */

#else

#define	WDEV(x)			(((x)<<1) & 0x0006)	/* event generated on roll over */

#endif /* _MISRA_RULES */

#define	WDEV_RESET		0x0000				/* generate reset event	on roll	over */

#define	WDEV_NMI		0x0002				/* generate NMI	event on roll over */

#define	WDEV_GPI		0x0004				/* generate GP IRQ on roll over */

#define	WDEV_NONE		0x0006				/* no event on roll over */

#define	WDEN			0x0FF0				/* enable watchdog */

#define	WDDIS			0x0AD0				/* disable watchdog */

#define	WDRO			0x8000				/* watchdog rolled over	latch */



/* deprecated WDOG_CTL Register	Masks for legacy code */

#define	ICTL WDEV

#define	ENABLE_RESET	WDEV_RESET

#define	WDOG_RESET		WDEV_RESET

#define	ENABLE_NMI		WDEV_NMI

#define	WDOG_NMI		WDEV_NMI

#define	ENABLE_GPI		WDEV_GPI

#define	WDOG_GPI		WDEV_GPI

#define	DISABLE_EVT	WDEV_NONE

#define	WDOG_NONE		WDEV_NONE



#define	TMR_EN			WDEN

#define	WDOG_DISABLE		WDDIS

#define	TRO			WDRO



#define	ICTL_P0			0x01

#define	ICTL_P1			0x02

#define	TRO_P			0x0F





/* ***************************** UART CONTROLLER MASKS ********************** */

/* UARTx_LCR Register */

#ifdef _MISRA_RULES

arch/blackfin/mach-bf548/include/mach/defBF54x_base.h

+0 −6
Original line number Diff line number Diff line
@@ -2092,12 +2092,6 @@ 
#define                     TRUN6  0x40000000 /* Timer 6 Slave Enable Status */

#define                     TRUN7  0x80000000 /* Timer 7 Slave Enable Status */



/* Bit masks for WDOG_CTL */



#define                      WDEV  0x6        /* Watchdog Event */

#define                      WDEN  0xff0      /* Watchdog Enable */

#define                      WDRO  0x8000     /* Watchdog Rolled Over */



/* Bit masks for CNT_CONFIG */



#define                      CNTE  0x1        /* Counter Enable */