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Commit 340c0c53 authored by Jason Gunthorpe's avatar Jason Gunthorpe Committed by Alan Tull
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fpga zynq: Fix incorrect ISR state on bootup



It is best practice to clear and mask all interrupts before
associating the IRQ, and this should be done after the clock
is enabled.

This corrects a bad result from zynq_fpga_ops_state on bootup
where left over latched values in INT_STS_OFFSET caused it to
report an unconfigured FPGA as configured.

After this change the boot up operating state for an unconfigured
FPGA reports 'unknown'.

Signed-off-by: default avatarJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: default avatarAlan Tull <atull@opensource.altera.com>
Acked-by: default avatarMoritz Fischer <moritz.fischer@ettus.com>
parent 80baf649
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