Loading arch/arc/include/asm/entry.h +0 −16 Original line number Diff line number Diff line Loading @@ -432,9 +432,6 @@ st.a r9, [sp, -4] lr r9, [erbta] st.a r9, [sp, -4] /* move up by 1 word to "create" pt_regs->"stack_place_holder" */ sub sp, sp, 4 .endm /*-------------------------------------------------------------- Loading Loading @@ -474,9 +471,6 @@ * by hardware and that is not good. *-------------------------------------------------------------*/ .macro RESTORE_ALL_SYS add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */ ld.ab r9, [sp, 4] sr r9, [erbta] ld.ab r9, [sp, 4] Loading Loading @@ -530,9 +524,6 @@ st.a r9, [sp, -4] lr r9, [bta_l1] st.a r9, [sp, -4] /* move up by 1 word to "create" pt_regs->"stack_place_holder" */ sub sp, sp, 4 .endm .macro SAVE_ALL_INT2 Loading Loading @@ -561,9 +552,6 @@ st.a r9, [sp, -4] lr r9, [bta_l2] st.a r9, [sp, -4] /* move up by 1 word to "create" pt_regs->"stack_place_holder" */ sub sp, sp, 4 .endm /*-------------------------------------------------------------- Loading @@ -577,8 +565,6 @@ *-------------------------------------------------------------*/ .macro RESTORE_ALL_INT1 add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */ ld.ab r9, [sp, 4] /* Actual reg file */ sr r9, [bta_l1] ld.ab r9, [sp, 4] Loading @@ -601,8 +587,6 @@ .endm .macro RESTORE_ALL_INT2 add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */ ld.ab r9, [sp, 4] sr r9, [bta_l2] ld.ab r9, [sp, 4] Loading arch/arc/include/asm/ptrace.h +0 −6 Original line number Diff line number Diff line Loading @@ -17,12 +17,6 @@ /* THE pt_regs: Defines how regs are saved during entry into kernel */ struct pt_regs { /* * 1 word gutter after reg-file has been saved * Technically not needed, Since SP always points to a "full" location * (vs. "empty"). But pt_regs is shared with tools.... */ long res; /* Real registers */ long bta; /* bta_l1, bta_l2, erbta */ Loading arch/arc/include/uapi/asm/ptrace.h +7 −4 Original line number Diff line number Diff line Loading @@ -20,16 +20,19 @@ * * This is to decouple pt_regs from user-space ABI, to be able to change it * w/o affecting the ABI. * Although the layout (initial padding) is similar to pt_regs to have some * optimizations when copying pt_regs to/from user_regs_struct. * * The intermediate pad,pad2 are relics of initial layout based on pt_regs * for optimizations when copying pt_regs to/from user_regs_struct. * We no longer need them, but can't be changed as they are part of ABI now. * * Also, sigcontext only care about the scratch regs as that is what we really * save/restore for signal handling. * save/restore for signal handling. However gdb also uses the same struct * hence callee regs need to be in there too. */ struct user_regs_struct { struct { long pad; struct { long bta, lp_start, lp_end, lp_count; long status32, ret, blink, fp, gp; long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; Loading arch/arc/kernel/ptrace.c +8 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,13 @@ static int genregs_get(struct task_struct *target, offsetof(struct user_regs_struct, LOC), \ offsetof(struct user_regs_struct, LOC) + 4); #define REG_O_ZERO(LOC) \ if (!ret) \ ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, \ offsetof(struct user_regs_struct, LOC), \ offsetof(struct user_regs_struct, LOC) + 4); REG_O_ZERO(pad); REG_O_CHUNK(scratch, callee, ptregs); REG_O_CHUNK(callee, efa, cregs); REG_O_CHUNK(efa, stop_pc, &target->thread.fault_address); Loading Loading @@ -88,6 +95,7 @@ static int genregs_set(struct task_struct *target, offsetof(struct user_regs_struct, LOC), \ offsetof(struct user_regs_struct, LOC) + 4); REG_IGNORE_ONE(pad); /* TBD: disallow updates to STATUS32, orig_r8 etc*/ REG_IN_CHUNK(scratch, callee, ptregs); /* pt_regs[bta..orig_r8] */ REG_IN_CHUNK(callee, efa, cregs); /* callee_regs[r25..r13] */ Loading Loading
arch/arc/include/asm/entry.h +0 −16 Original line number Diff line number Diff line Loading @@ -432,9 +432,6 @@ st.a r9, [sp, -4] lr r9, [erbta] st.a r9, [sp, -4] /* move up by 1 word to "create" pt_regs->"stack_place_holder" */ sub sp, sp, 4 .endm /*-------------------------------------------------------------- Loading Loading @@ -474,9 +471,6 @@ * by hardware and that is not good. *-------------------------------------------------------------*/ .macro RESTORE_ALL_SYS add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */ ld.ab r9, [sp, 4] sr r9, [erbta] ld.ab r9, [sp, 4] Loading Loading @@ -530,9 +524,6 @@ st.a r9, [sp, -4] lr r9, [bta_l1] st.a r9, [sp, -4] /* move up by 1 word to "create" pt_regs->"stack_place_holder" */ sub sp, sp, 4 .endm .macro SAVE_ALL_INT2 Loading Loading @@ -561,9 +552,6 @@ st.a r9, [sp, -4] lr r9, [bta_l2] st.a r9, [sp, -4] /* move up by 1 word to "create" pt_regs->"stack_place_holder" */ sub sp, sp, 4 .endm /*-------------------------------------------------------------- Loading @@ -577,8 +565,6 @@ *-------------------------------------------------------------*/ .macro RESTORE_ALL_INT1 add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */ ld.ab r9, [sp, 4] /* Actual reg file */ sr r9, [bta_l1] ld.ab r9, [sp, 4] Loading @@ -601,8 +587,6 @@ .endm .macro RESTORE_ALL_INT2 add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */ ld.ab r9, [sp, 4] sr r9, [bta_l2] ld.ab r9, [sp, 4] Loading
arch/arc/include/asm/ptrace.h +0 −6 Original line number Diff line number Diff line Loading @@ -17,12 +17,6 @@ /* THE pt_regs: Defines how regs are saved during entry into kernel */ struct pt_regs { /* * 1 word gutter after reg-file has been saved * Technically not needed, Since SP always points to a "full" location * (vs. "empty"). But pt_regs is shared with tools.... */ long res; /* Real registers */ long bta; /* bta_l1, bta_l2, erbta */ Loading
arch/arc/include/uapi/asm/ptrace.h +7 −4 Original line number Diff line number Diff line Loading @@ -20,16 +20,19 @@ * * This is to decouple pt_regs from user-space ABI, to be able to change it * w/o affecting the ABI. * Although the layout (initial padding) is similar to pt_regs to have some * optimizations when copying pt_regs to/from user_regs_struct. * * The intermediate pad,pad2 are relics of initial layout based on pt_regs * for optimizations when copying pt_regs to/from user_regs_struct. * We no longer need them, but can't be changed as they are part of ABI now. * * Also, sigcontext only care about the scratch regs as that is what we really * save/restore for signal handling. * save/restore for signal handling. However gdb also uses the same struct * hence callee regs need to be in there too. */ struct user_regs_struct { struct { long pad; struct { long bta, lp_start, lp_end, lp_count; long status32, ret, blink, fp, gp; long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; Loading
arch/arc/kernel/ptrace.c +8 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,13 @@ static int genregs_get(struct task_struct *target, offsetof(struct user_regs_struct, LOC), \ offsetof(struct user_regs_struct, LOC) + 4); #define REG_O_ZERO(LOC) \ if (!ret) \ ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, \ offsetof(struct user_regs_struct, LOC), \ offsetof(struct user_regs_struct, LOC) + 4); REG_O_ZERO(pad); REG_O_CHUNK(scratch, callee, ptregs); REG_O_CHUNK(callee, efa, cregs); REG_O_CHUNK(efa, stop_pc, &target->thread.fault_address); Loading Loading @@ -88,6 +95,7 @@ static int genregs_set(struct task_struct *target, offsetof(struct user_regs_struct, LOC), \ offsetof(struct user_regs_struct, LOC) + 4); REG_IGNORE_ONE(pad); /* TBD: disallow updates to STATUS32, orig_r8 etc*/ REG_IN_CHUNK(scratch, callee, ptregs); /* pt_regs[bta..orig_r8] */ REG_IN_CHUNK(callee, efa, cregs); /* callee_regs[r25..r13] */ Loading