Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2d78b1da authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-4.17-dt-bindings' of...

Merge tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Pull "dt-bindings: Tegra changes for v4.17-rc1" from Thierry Reding:

Mostly cleanup of existing bindings and initial support for Tegra194.

* tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt/bindings: Fix binding examples for Tegra GMI controller
  dt-bindings: phy: Clarify ULPI PHY source clock
  dt-bindings: tegra: Add documentation for nvidia,tegra194-pmc
  dt-bindings: tegra: Add missing chips and NVIDIA boards
parents 4f21a120 2c730556
Loading
Loading
Loading
Loading
+16 −0
Original line number Diff line number Diff line
@@ -9,6 +9,12 @@ following compatible values:

  nvidia,tegra20
  nvidia,tegra30
  nvidia,tegra114
  nvidia,tegra124
  nvidia,tegra132
  nvidia,tegra210
  nvidia,tegra186
  nvidia,tegra194

Boards
-------------------------------------------
@@ -26,8 +32,18 @@ board-specific compatible values:
  nvidia,cardhu
  nvidia,cardhu-a02
  nvidia,cardhu-a04
  nvidia,dalmore
  nvidia,harmony
  nvidia,jetson-tk1
  nvidia,norrin
  nvidia,p2371-0000
  nvidia,p2371-2180
  nvidia,p2571
  nvidia,p2771-0000
  nvidia,p2972-0000
  nvidia,roth
  nvidia,seaboard
  nvidia,tn7
  nvidia,ventana
  toradex,apalis_t30
  toradex,apalis_t30-eval
+2 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ NVIDIA Tegra Power Management Controller (PMC)
Required properties:
- compatible: Should contain one of the following:
  - "nvidia,tegra186-pmc": for Tegra186
  - "nvidia,tegra194-pmc": for Tegra194
- reg: Must contain an (offset, length) pair of the register set for each
  entry in reg-names.
- reg-names: Must include the following entries:
@@ -10,6 +11,7 @@ Required properties:
  - "wake"
  - "aotag"
  - "scratch"
  - "misc" (Only for Tegra194)

Optional properties:
- nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
+2 −4
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ Example with two SJA1000 CAN controllers connected to the GMI bus. We wrap the
controllers with a simple-bus node since they are all connected to the same
chip-select (CS4), in this example external address decoding is provided:

gmi@70090000 {
gmi@70009000 {
	compatible = "nvidia,tegra20-gmi";
	reg = <0x70009000 0x1000>;
	#address-cells = <2>;
@@ -84,7 +84,6 @@ gmi@70090000 {
	reset-names = "gmi";
	ranges = <4 0 0xd0000000 0xfffffff>;


	bus@4,0 {
		compatible = "simple-bus";
		#address-cells = <1>;
@@ -109,7 +108,7 @@ gmi@70090000 {
Example with one SJA1000 CAN controller connected to the GMI bus
on CS4:

gmi@70090000 {
gmi@70009000 {
	compatible = "nvidia,tegra20-gmi";
	reg = <0x70009000 0x1000>;
	#address-cells = <2>;
@@ -120,7 +119,6 @@ gmi@70090000 {
	reset-names = "gmi";
	ranges = <4 0 0xd0000000 0xfffffff>;


	can@4,0 {
		reg = <4 0 0x100>;
		nvidia,snor-mux-mode;
+3 −1
Original line number Diff line number Diff line
@@ -21,7 +21,9 @@ Required properties :
   - timer: The timeout clock (clk_m). Present if phy_type == utmi.
   - utmi-pads: The clock needed to access the UTMI pad control registers.
     Present if phy_type == utmi.
   - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
   - ulpi-link: The clock Tegra provides to the ULPI PHY (usually pad DAP_MCLK2
     with pad group aka "nvidia,pins" cdev2 and pin mux option config aka
     "nvidia,function" pllp_out4).
     Present if phy_type == ulpi, and ULPI link mode is in use.
 - resets : Must contain an entry for each entry in reset-names.
   See ../reset/reset.txt for details.