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Commit 2ca9faa5 authored Apr 05, 2017 by Chris Wilson

drm/i915: Assert the engine is idle before overwiting the HWS

When we update the global seqno (on the engine timeline), we modify HW
state (both registers and mapped pages). As we do this, we should be
sure that the HW is idle and we are not causing a conflict. The caller
is supposed to wait_for_idle before calling us to update the seqno, so
let's assert they have and the engine is indeed idle.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170405153055.28123-1-chris@chris-wilson.co.uk

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

parent db5ba0d8

drivers/gpu/drm/i915/i915_gem_request.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -214,8 +214,8 @@ static int reset_all_global_seqno(struct drm_i915_private *i915, u32 seqno)
		}

		/* Finally reset hw state */
		tl->seqno = seqno;
		intel_engine_init_global_seqno(engine, seqno);
		tl->seqno = seqno;

		list_for_each_entry(timeline, &i915->gt.timelines, link)
		memset(timeline->engine[id].sync_seqno, 0,

drivers/gpu/drm/i915/intel_engine_cs.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -223,6 +223,8 @@ void intel_engine_init_global_seqno(struct intel_engine_cs *engine, u32 seqno)
		{
		struct drm_i915_private *dev_priv = engine->i915;

		GEM_BUG_ON(!intel_engine_is_idle(engine));

		/* Our semaphore implementation is strictly monotonic (i.e. we proceed
		* so long as the semaphore value in the register/page is greater
		* than the sync value), so whenever we reset the seqno,
		@@ -260,6 +262,8 @@ void intel_engine_init_global_seqno(struct intel_engine_cs *engine, u32 seqno)
		* there are any waiters for that seqno.
		*/
		intel_engine_wakeup(engine);

		GEM_BUG_ON(intel_engine_get_seqno(engine) != seqno);
		}

		static void intel_engine_init_timeline(struct intel_engine_cs *engine)