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Commit 2c8b0c5a authored by Christian Gmeiner's avatar Christian Gmeiner Committed by Lucas Stach
Browse files

drm/etnaviv: need to disable clock gating when doing profiling 



As done by Vivante kernel driver.

Signed-off-by: default avatarChristian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent 49168ee9

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

+13 −0
Original line number Diff line number Diff line
@@ -1346,6 +1346,13 @@ static void sync_point_perfmon_sample(struct etnaviv_gpu *gpu, 
static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,

	struct etnaviv_event *event)

{

	u32 val;



	/* disable clock gating */

	val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);

	val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;

	gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);



	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);

}
@@ -1354,6 +1361,7 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu, 
{

	const struct etnaviv_cmdbuf *cmdbuf = event->cmdbuf;

	unsigned int i;

	u32 val;



	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
@@ -1362,6 +1370,11 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu, 


		*pmr->bo_vma = pmr->sequence;

	}



	/* enable clock gating */

	val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);

	val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;

	gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);

}