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Commit 2b768b6c authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
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[ARM] 5391/1: AT91: Enable GPIO clocks earlier



Enable the GPIO clocks earlier in the initialization sequence.  This
allow the board-setup code to read and set GPIO pins.

Signed-off-by: default avatarMarc Pignat <marc.pignat@hevs.ch>
Signed-off-by: default avatarAndrew Victor <linux@maxim.org.za>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 2af29b78
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+10 −5
Original line number Diff line number Diff line
@@ -490,7 +490,8 @@ postcore_initcall(at91_gpio_debugfs_init);

/*--------------------------------------------------------------------------*/

/* This lock class tells lockdep that GPIO irqs are in a different
/*
 * This lock class tells lockdep that GPIO irqs are in a different
 * category than their parents, so it won't report false recursion.
 */
static struct lock_class_key gpio_lock_class;
@@ -509,9 +510,6 @@ void __init at91_gpio_irq_setup(void)
		unsigned	id = this->id;
		unsigned	i;

		/* enable PIO controller's clock */
		clk_enable(this->clock);

		__raw_writel(~0, this->regbase + PIO_IDR);

		for (i = 0, pin = this->chipbase; i < 32; i++, pin++) {
@@ -556,7 +554,14 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
		data->chipbase = PIN_BASE + i * 32;
		data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS;

		/* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
		/* enable PIO controller's clock */
		clk_enable(data->clock);

		/*
		 * Some processors share peripheral ID between multiple GPIO banks.
		 *  SAM9263 (PIOC, PIOD, PIOE)
		 *  CAP9 (PIOA, PIOB, PIOC, PIOD)
		 */
		if (last && last->id == data->id)
			last->next = data;
	}