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Commit 2a0ee94f authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter
Browse files

drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+ 



On B0 and C0 steppings the workaround enable bit would be overriden by
default, so the overriding must be disabled.

The WA was added in
commit 83a24979
Author: Nick Hoath <nicholas.hoath@intel.com>
Date:   Fri Apr 10 13:12:26 2015 +0100

    drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent

Spotted-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 118182e9

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -5791,6 +5791,7 @@ enum skl_disp_power_wells { 


/* GEN8 chicken */

#define HDC_CHICKEN0				0x7300

#define  HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE	(1<<15)

#define  HDC_FENCE_DEST_SLM_DISABLE		(1<<14)

#define  HDC_DONOT_FETCH_MEM_WHEN_MASKED	(1<<11)

#define  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT	(1<<5)

drivers/gpu/drm/i915/intel_ringbuffer.c

+5 −2
Original line number Diff line number Diff line
@@ -1043,6 +1043,7 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring) 
{

	struct drm_device *dev = ring->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	uint32_t tmp;



	gen9_init_workarounds(ring);
@@ -1058,8 +1059,10 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring) 
	}



	/* WaForceContextSaveRestoreNonCoherent:bxt */

	WA_SET_BIT_MASKED(HDC_CHICKEN0,

			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);

	tmp = HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT;

	if (INTEL_REVID(dev) >= BXT_REVID_B0)

		tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;

	WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);



	return 0;

}