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Commit 29ef7a3e authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Benjamin Herrenschmidt
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powerpc/mm: Fix tlbie to add AVAL fields for 64K pages 



The if condition check was based on a draft ISA doc. Remove the same.

Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 2d6b63bb

arch/powerpc/mm/hash_native_64.c

+16 −22
Original line number Diff line number Diff line
@@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) 
		va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);

		va |= penc << 12;

		va |= ssize << 8;

		/* Add AVAL part */

		if (psize != apsize) {

		/*

			 * MPSS, 64K base page size and 16MB parge page size

		 * AVAL bits:

		 * We don't need all the bits, but rest of the bits

		 * must be ignored by the processor.

		 * vpn cover upto 65 bits of va. (0...65) and we need

		 * 58..64 bits of va.

		 */

			va |= (vpn & 0xfe);

		}

		va |= (vpn & 0xfe); /* AVAL */

		va |= 1; /* L */

		asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)

			     : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
@@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) 
		va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);

		va |= penc << 12;

		va |= ssize << 8;

		/* Add AVAL part */

		if (psize != apsize) {

		/*

			 * MPSS, 64K base page size and 16MB parge page size

		 * AVAL bits:

		 * We don't need all the bits, but rest of the bits

		 * must be ignored by the processor.

		 * vpn cover upto 65 bits of va. (0...65) and we need

		 * 58..64 bits of va.

		 */

		va |= (vpn & 0xfe);

		}

		va |= 1; /* L */

		asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"

			     : : "r"(va) : "memory");