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Commit 29b9bde6 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: Make ->update_primary_plane infallible 



Way back we've used this to reject framebuffers with unsupported
pixel formats. But since the modesetting reorg with the compute
config stage we reject those much earlier and just BUG() in this
callback. So switch to a void return type.

Reviewed-by: default avatarAkash Goel <akash.goel@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 227f782e

drivers/gpu/drm/i915/i915_drv.h

+3 −3
Original line number Diff line number Diff line
@@ -471,7 +471,7 @@ struct drm_i915_display_funcs { 
			  struct drm_framebuffer *fb,

			  struct drm_i915_gem_object *obj,

			  uint32_t flags);

	int (*update_primary_plane)(struct drm_crtc *crtc,

	void (*update_primary_plane)(struct drm_crtc *crtc,

				     struct drm_framebuffer *fb,

				     int x, int y);

	void (*hpd_irq_setup)(struct drm_device *dev);

drivers/gpu/drm/i915/intel_display.c

+10 −19
Original line number Diff line number Diff line
@@ -2330,7 +2330,7 @@ static void intel_find_plane_obj(struct intel_crtc *intel_crtc, 
	}

}



static int i9xx_update_primary_plane(struct drm_crtc *crtc,

static void i9xx_update_primary_plane(struct drm_crtc *crtc,

				      struct drm_framebuffer *fb,

				      int x, int y)

{
@@ -2418,11 +2418,9 @@ static int i9xx_update_primary_plane(struct drm_crtc *crtc, 
	} else

		I915_WRITE(DSPADDR(plane), i915_gem_obj_ggtt_offset(obj) + linear_offset);

	POSTING_READ(reg);



	return 0;

}



static int ironlake_update_primary_plane(struct drm_crtc *crtc,

static void ironlake_update_primary_plane(struct drm_crtc *crtc,

					  struct drm_framebuffer *fb,

					  int x, int y)

{
@@ -2502,8 +2500,6 @@ static int ironlake_update_primary_plane(struct drm_crtc *crtc, 
		I915_WRITE(DSPLINOFF(plane), linear_offset);

	}

	POSTING_READ(reg);



	return 0;

}



/* Assume fb object is pinned & idle & fenced and just update base pointers */
@@ -2518,7 +2514,9 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, 
		dev_priv->display.disable_fbc(dev);

	intel_increase_pllclock(crtc);



	return dev_priv->display.update_primary_plane(crtc, fb, x, y);

	dev_priv->display.update_primary_plane(crtc, fb, x, y);



	return 0;

}



void intel_display_handle_reset(struct drm_device *dev)
@@ -2677,14 +2675,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, 
		intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay;

	}



	ret = dev_priv->display.update_primary_plane(crtc, fb, x, y);

	if (ret) {

		mutex_lock(&dev->struct_mutex);

		intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);

		mutex_unlock(&dev->struct_mutex);

		DRM_ERROR("failed to update base address\n");

		return ret;

	}

	dev_priv->display.update_primary_plane(crtc, fb, x, y);



	old_fb = crtc->primary->fb;

	crtc->primary->fb = fb;