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Commit 289278cb authored by Alex Deucher's avatar Alex Deucher
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drm: drop drm_pcie_get_speed_cap_mask and drm_pcie_get_max_link_width 



These functions duplicated functionality which was ultimately added
to the pci core.

All users of these functions have been ported to using the newly
exposed pci functionality.  These functions are no longer used,
so drop them.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarDave Airlie <airlied@redhat.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5f152a57

drivers/gpu/drm/drm_pci.c

+0 −58
Original line number Diff line number Diff line
@@ -326,64 +326,6 @@ int drm_legacy_pci_init(struct drm_driver *driver, struct pci_driver *pdriver) 
}

EXPORT_SYMBOL(drm_legacy_pci_init);



int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)

{

	struct pci_dev *root;

	u32 lnkcap, lnkcap2;



	*mask = 0;

	if (!dev->pdev)

		return -EINVAL;



	root = dev->pdev->bus->self;



	/* we've been informed via and serverworks don't make the cut */

	if (root->vendor == PCI_VENDOR_ID_VIA ||

	    root->vendor == PCI_VENDOR_ID_SERVERWORKS)

		return -EINVAL;



	pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap);

	pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2);



	if (lnkcap2) {	/* PCIe r3.0-compliant */

		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)

			*mask |= DRM_PCIE_SPEED_25;

		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)

			*mask |= DRM_PCIE_SPEED_50;

		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)

			*mask |= DRM_PCIE_SPEED_80;

	} else {	/* pre-r3.0 */

		if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB)

			*mask |= DRM_PCIE_SPEED_25;

		if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB)

			*mask |= (DRM_PCIE_SPEED_25 | DRM_PCIE_SPEED_50);

	}



	DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", root->vendor, root->device, lnkcap, lnkcap2);

	return 0;

}

EXPORT_SYMBOL(drm_pcie_get_speed_cap_mask);



int drm_pcie_get_max_link_width(struct drm_device *dev, u32 *mlw)

{

	struct pci_dev *root;

	u32 lnkcap;



	*mlw = 0;

	if (!dev->pdev)

		return -EINVAL;



	root = dev->pdev->bus->self;



	pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap);



	*mlw = (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4;



	DRM_INFO("probing mlw for device %x:%x = %x\n", root->vendor, root->device, lnkcap);

	return 0;

}

EXPORT_SYMBOL(drm_pcie_get_max_link_width);



#else



void drm_pci_agp_destroy(struct drm_device *dev) {}

include/drm/drm_pci.h

+0 −7
Original line number Diff line number Diff line
@@ -58,11 +58,4 @@ static inline int drm_get_pci_dev(struct pci_dev *pdev, 
}

#endif



#define DRM_PCIE_SPEED_25 1

#define DRM_PCIE_SPEED_50 2

#define DRM_PCIE_SPEED_80 4



int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *speed_mask);

int drm_pcie_get_max_link_width(struct drm_device *dev, u32 *mlw);



#endif /* _DRM_PCI_H_ */