Loading Documentation/devicetree/bindings/clock/marvell,mmp2.txt 0 → 100644 +21 −0 Original line number Diff line number Diff line * Marvell MMP2 Clock Controller The MMP2 clock subsystem generates and supplies clock to various controllers within the MMP2 SoC. Required Properties: - compatible: should be one of the following. - "marvell,mmp2-clock" - controller compatible with MMP2 SoC. - reg: physical base address of the clock subsystem and length of memory mapped region. There are 3 places in SOC has clock control logic: "mpmu", "apmu", "apbc". So three reg spaces need to be defined. - #clock-cells: should be 1. - #reset-cells: should be 1. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. All these identifier could be found in <dt-bindings/clock/marvell-mmp2.h>. Documentation/devicetree/bindings/clock/marvell,pxa168.txt 0 → 100644 +21 −0 Original line number Diff line number Diff line * Marvell PXA168 Clock Controller The PXA168 clock subsystem generates and supplies clock to various controllers within the PXA168 SoC. Required Properties: - compatible: should be one of the following. - "marvell,pxa168-clock" - controller compatible with PXA168 SoC. - reg: physical base address of the clock subsystem and length of memory mapped region. There are 3 places in SOC has clock control logic: "mpmu", "apmu", "apbc". So three reg spaces need to be defined. - #clock-cells: should be 1. - #reset-cells: should be 1. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>. Documentation/devicetree/bindings/clock/marvell,pxa910.txt 0 → 100644 +21 −0 Original line number Diff line number Diff line * Marvell PXA910 Clock Controller The PXA910 clock subsystem generates and supplies clock to various controllers within the PXA910 SoC. Required Properties: - compatible: should be one of the following. - "marvell,pxa910-clock" - controller compatible with PXA910 SoC. - reg: physical base address of the clock subsystem and length of memory mapped region. There are 4 places in SOC has clock control logic: "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined. - #clock-cells: should be 1. - #reset-cells: should be 1. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>. arch/arm/boot/dts/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -164,6 +164,9 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \ pxa910-dkb.dtb \ mmp2-brownstone.dtb dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb dtb-$(CONFIG_ARCH_MXC) += \ imx1-ads.dtb \ Loading arch/arm/boot/dts/mmp2-brownstone.dts +1 −1 Original line number Diff line number Diff line Loading @@ -8,7 +8,7 @@ */ /dts-v1/; /include/ "mmp2.dtsi" #include "mmp2.dtsi" / { model = "Marvell MMP2 Brownstone Development Board"; Loading Loading
Documentation/devicetree/bindings/clock/marvell,mmp2.txt 0 → 100644 +21 −0 Original line number Diff line number Diff line * Marvell MMP2 Clock Controller The MMP2 clock subsystem generates and supplies clock to various controllers within the MMP2 SoC. Required Properties: - compatible: should be one of the following. - "marvell,mmp2-clock" - controller compatible with MMP2 SoC. - reg: physical base address of the clock subsystem and length of memory mapped region. There are 3 places in SOC has clock control logic: "mpmu", "apmu", "apbc". So three reg spaces need to be defined. - #clock-cells: should be 1. - #reset-cells: should be 1. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. All these identifier could be found in <dt-bindings/clock/marvell-mmp2.h>.
Documentation/devicetree/bindings/clock/marvell,pxa168.txt 0 → 100644 +21 −0 Original line number Diff line number Diff line * Marvell PXA168 Clock Controller The PXA168 clock subsystem generates and supplies clock to various controllers within the PXA168 SoC. Required Properties: - compatible: should be one of the following. - "marvell,pxa168-clock" - controller compatible with PXA168 SoC. - reg: physical base address of the clock subsystem and length of memory mapped region. There are 3 places in SOC has clock control logic: "mpmu", "apmu", "apbc". So three reg spaces need to be defined. - #clock-cells: should be 1. - #reset-cells: should be 1. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. All these identifier could be found in <dt-bindings/clock/marvell,pxa168.h>.
Documentation/devicetree/bindings/clock/marvell,pxa910.txt 0 → 100644 +21 −0 Original line number Diff line number Diff line * Marvell PXA910 Clock Controller The PXA910 clock subsystem generates and supplies clock to various controllers within the PXA910 SoC. Required Properties: - compatible: should be one of the following. - "marvell,pxa910-clock" - controller compatible with PXA910 SoC. - reg: physical base address of the clock subsystem and length of memory mapped region. There are 4 places in SOC has clock control logic: "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined. - #clock-cells: should be 1. - #reset-cells: should be 1. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. All these identifier could be found in <dt-bindings/clock/marvell-pxa910.h>.
arch/arm/boot/dts/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -164,6 +164,9 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \ pxa910-dkb.dtb \ mmp2-brownstone.dtb dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb dtb-$(CONFIG_ARCH_MXC) += \ imx1-ads.dtb \ Loading
arch/arm/boot/dts/mmp2-brownstone.dts +1 −1 Original line number Diff line number Diff line Loading @@ -8,7 +8,7 @@ */ /dts-v1/; /include/ "mmp2.dtsi" #include "mmp2.dtsi" / { model = "Marvell MMP2 Brownstone Development Board"; Loading