Commit 267db663 authored Jun 25, 2015 by Damien Lespiau Committed by Daniel Vetter Jun 26, 2015

drm/i915/skl: Prefer even dividers for SKL DPLLs



Currently, if an odd divider improves the deviation (minimizes it), we
take that divider. The recommendation is to prefer even dividers.

v2: Move the check at the right place after having inverted the two for
    loops in the previous patch.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent dc253813

drivers/gpu/drm/i915/intel_ddi.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -1317,6 +1317,13 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
		p);
		}
		}

		/*
		* If a solution is found with an even divider, prefer
		* this one.
		*/
		if (d == 0 && ctx.p)
		break;
		}

		if (!ctx.p) {