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Commit 25be597a authored by Mark Rutland's avatar Mark Rutland Committed by Will Deacon
Browse files

arm64: kill config_sctlr_el1() 



Now that we have sysreg_clear_set(), we can consistently use this
instead of config_sctlr_el1().

Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarDave Martin <dave.martin@arm.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 1c312e84

arch/arm64/include/asm/sysreg.h

+0 −10
Original line number Diff line number Diff line
@@ -742,16 +742,6 @@ asm( 
		write_sysreg(__scs_new, sysreg);			\

} while (0)



static inline void config_sctlr_el1(u32 clear, u32 set)

{

	u32 val;



	val = read_sysreg(sctlr_el1);

	val &= ~clear;

	val |= set;

	write_sysreg(val, sctlr_el1);

}



#endif



#endif	/* __ASM_SYSREG_H */

arch/arm64/kernel/armv8_deprecated.c

+4 −4
Original line number Diff line number Diff line
@@ -511,9 +511,9 @@ static int cp15barrier_handler(struct pt_regs *regs, u32 instr) 
static int cp15_barrier_set_hw_mode(bool enable)

{

	if (enable)

		config_sctlr_el1(0, SCTLR_EL1_CP15BEN);

		sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_CP15BEN);

	else

		config_sctlr_el1(SCTLR_EL1_CP15BEN, 0);

		sysreg_clear_set(sctlr_el1, SCTLR_EL1_CP15BEN, 0);

	return 0;

}
@@ -548,9 +548,9 @@ static int setend_set_hw_mode(bool enable) 
		return -EINVAL;



	if (enable)

		config_sctlr_el1(SCTLR_EL1_SED, 0);

		sysreg_clear_set(sctlr_el1, SCTLR_EL1_SED, 0);

	else

		config_sctlr_el1(0, SCTLR_EL1_SED);

		sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_SED);

	return 0;

}

arch/arm64/kernel/cpu_errata.c

+1 −2
Original line number Diff line number Diff line
@@ -82,8 +82,7 @@ has_mismatched_cache_type(const struct arm64_cpu_capabilities *entry, 
static void

cpu_enable_trap_ctr_access(const struct arm64_cpu_capabilities *__unused)

{

	/* Clear SCTLR_EL1.UCT */

	config_sctlr_el1(SCTLR_EL1_UCT, 0);

	sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCT, 0);

}



atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1);

arch/arm64/kernel/traps.c

+1 −1
Original line number Diff line number Diff line
@@ -411,7 +411,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) 


void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)

{

	config_sctlr_el1(SCTLR_EL1_UCI, 0);

	sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCI, 0);

}



#define __user_cache_maint(insn, address, res)			\

arch/arm64/mm/fault.c

+1 −1
Original line number Diff line number Diff line
@@ -879,7 +879,7 @@ void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused) 
	 */

	WARN_ON_ONCE(in_interrupt());



	config_sctlr_el1(SCTLR_EL1_SPAN, 0);

	sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0);

	asm(SET_PSTATE_PAN(1));

}

#endif /* CONFIG_ARM64_PAN */