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Commit 2448e484 authored by James Smart's avatar James Smart Committed by Martin K. Petersen
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scsi: lpfc: Enlarge nvmet asynchronous receive buffer counts



Under large io load, the current sizing of asynchronous buffer counts
could be exceeded, indicated by a 2885 log message:

  2885 Port Status Event: port status reg 0x81800000, port smphr
      reg 0xc000, error 1=0x52004a01, error 2=0x0

Enlarge the async receive queue size.  Allow for a configurable number
of buffers to be posted to each RQ, using the new attribute
lpfc_nvmet_mrq_post.

Signed-off-by: default avatarDick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: default avatarJames Smart <james.smart@broadcom.com>
Reviewed-by: default avatarHannes Reinecke <hare@suse.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 66a210ff
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+1 −0
Original line number Diff line number Diff line
@@ -782,6 +782,7 @@ struct lpfc_hba {
	uint32_t cfg_nvme_oas;
	uint32_t cfg_nvme_embed_cmd;
	uint32_t cfg_nvme_io_channel;
	uint32_t cfg_nvmet_mrq_post;
	uint32_t cfg_nvmet_mrq;
	uint32_t cfg_enable_nvmet;
	uint32_t cfg_nvme_enable_fb;
+11 −0
Original line number Diff line number Diff line
@@ -3423,6 +3423,15 @@ LPFC_ATTR_R(nvmet_mrq,
	    LPFC_NVMET_MRQ_AUTO, LPFC_NVMET_MRQ_AUTO, LPFC_NVMET_MRQ_MAX,
	    "Specify number of RQ pairs for processing NVMET cmds");

/*
 * lpfc_nvmet_mrq_post: Specify number of RQ buffer to initially post
 * to each NVMET RQ. Range 64 to 2048, default is 512.
 */
LPFC_ATTR_R(nvmet_mrq_post,
	    LPFC_NVMET_RQE_DEF_POST, LPFC_NVMET_RQE_MIN_POST,
	    LPFC_NVMET_RQE_DEF_COUNT,
	    "Specify number of RQ buffers to initially post");

/*
 * lpfc_enable_fc4_type: Defines what FC4 types are supported.
 * Supported Values:  1 - register just FCP
@@ -5353,6 +5362,7 @@ struct device_attribute *lpfc_hba_attrs[] = {
	&dev_attr_lpfc_suppress_rsp,
	&dev_attr_lpfc_nvme_io_channel,
	&dev_attr_lpfc_nvmet_mrq,
	&dev_attr_lpfc_nvmet_mrq_post,
	&dev_attr_lpfc_nvme_enable_fb,
	&dev_attr_lpfc_nvmet_fb_size,
	&dev_attr_lpfc_enable_bg,
@@ -6403,6 +6413,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)

	lpfc_enable_fc4_type_init(phba, lpfc_enable_fc4_type);
	lpfc_nvmet_mrq_init(phba, lpfc_nvmet_mrq);
	lpfc_nvmet_mrq_post_init(phba, lpfc_nvmet_mrq_post);

	/* Initialize first burst. Target vs Initiator are different. */
	lpfc_nvme_enable_fb_init(phba, lpfc_nvme_enable_fb);
+4 −2
Original line number Diff line number Diff line
@@ -22,7 +22,9 @@
 ********************************************************************/

#define LPFC_NVMET_DEFAULT_SEGS		(64 + 1)	/* 256K IOs */
#define LPFC_NVMET_RQE_DEF_COUNT	512
#define LPFC_NVMET_RQE_MIN_POST		128
#define LPFC_NVMET_RQE_DEF_POST		512
#define LPFC_NVMET_RQE_DEF_COUNT	2048
#define LPFC_NVMET_SUCCESS_LEN		12

#define LPFC_NVMET_MRQ_OFF		0xffff
+1 −1
Original line number Diff line number Diff line
@@ -7199,7 +7199,7 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)
			lpfc_post_rq_buffer(
				phba, phba->sli4_hba.nvmet_mrq_hdr[i],
				phba->sli4_hba.nvmet_mrq_data[i],
				LPFC_NVMET_RQE_DEF_COUNT, i);
				phba->cfg_nvmet_mrq_post, i);
		}
	}