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Commit 2430bcda authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-arm64-for-4.17' of... 

Merge tag 'qcom-arm64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Pull "Qualcomm ARM64 Updates for v4.17" from Andy Gross:

* Fix GIC_CPU_MASK_SIMPLE and SPI5 config on MSM8996
* Add SDM845 and kryo385 documentation
* Add MSM8916 cooling maps, cpu frequency scaling, APCS, and A53 PLL
* Switch APCS to use mailbox on MSM8916
* Add rmtfs-mem on MSM8996

* tag 'qcom-arm64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: qcom: Fix SPI5 config on MSM8996
  dt-bindings: qcom: Add SDM845 bindings
  dt-bindings: arm: Document kryo385 cpu
  arm64: dts: msm8916: Add cpu cooling maps
  arm64: dts: msm8996: Add rmtfs sharedmem node
  arm64: dts: qcom: msm8916: Add CPU frequency scaling support
  arm64: dts: qcom: msm8916: Add clock properties to the APCS node
  arm64: dts: qcom: msm8916: Probe the APCS mailbox driver
  arm64: dts: qcom: msm8916: Add msm8916 A53 PLL DT node
  arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE()
parents b6f67b03 e723795c

Documentation/devicetree/bindings/arm/cpus.txt

+1 −0
Original line number Diff line number Diff line
@@ -185,6 +185,7 @@ described below. 
			    "nvidia,tegra186-denver"

			    "qcom,krait"

			    "qcom,kryo"

			    "qcom,kryo385"

			    "qcom,scorpion"

	- enable-method

		Value type: <stringlist>

Documentation/devicetree/bindings/arm/qcom.txt

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ The 'SoC' element must be one of the following strings: 
	msm8996

	mdm9615

	ipq8074

	sdm845



The 'board' element must be one of the following strings:

arch/arm64/boot/dts/qcom/msm8916.dtsi

+57 −3
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <dt-bindings/clock/qcom,gcc-msm8916.h>

#include <dt-bindings/reset/qcom,gcc-msm8916.h>

#include <dt-bindings/clock/qcom,rpmcc.h>

#include <dt-bindings/thermal/thermal.h>



/ {

	model = "Qualcomm Technologies, Inc. MSM8916";
@@ -113,6 +114,9 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

			#cooling-cells = <2>;

		};



		CPU1: cpu@1 {
@@ -122,6 +126,9 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

			#cooling-cells = <2>;

		};



		CPU2: cpu@2 {
@@ -131,6 +138,9 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

			#cooling-cells = <2>;

		};



		CPU3: cpu@3 {
@@ -140,6 +150,9 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

			#cooling-cells = <2>;

		};



		L2_0: l2-cache {
@@ -188,6 +201,13 @@ 
					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_alert0>;

					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};



		cpu-thermal1 {
@@ -208,10 +228,35 @@ 
					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_alert1>;

					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};



	};



	cpu_opp_table: cpu_opp_table {

		compatible = "operating-points-v2";

		opp-shared;



		opp-200000000 {

			opp-hz = /bits/ 64 <200000000>;

		};

		opp-400000000 {

			opp-hz = /bits/ 64 <400000000>;

		};

		opp-800000000 {

			opp-hz = /bits/ 64 <800000000>;

		};

		opp-998400000 {

			opp-hz = /bits/ 64 <998400000>;

		};

	};



	gpu_opp_table: opp_table {

		compatible = "operating-points-v2";
@@ -326,9 +371,18 @@ 
			status = "disabled";

		};



		apcs: syscon@b011000 {

			compatible = "syscon";

			reg = <0x0b011000 0x1000>;

		a53pll: clock@b016000 {

			compatible = "qcom,msm8916-a53pll";

			reg = <0xb016000 0x40>;

			#clock-cells = <0>;

		};



		apcs: mailbox@b011000 {

			compatible = "qcom,msm8916-apcs-kpss-global", "syscon";

			reg = <0xb011000 0x1000>;

			#mbox-cells = <1>;

			clocks = <&a53pll>;

			#clock-cells = <0>;

		};



		blsp1_uart2: serial@78b0000 {

arch/arm64/boot/dts/qcom/msm8996.dtsi

+17 −6
Original line number Diff line number Diff line
@@ -75,6 +75,17 @@ 
			reg = <0x0 0x86200000 0x0 0x2600000>;

			no-map;

		};



		rmtfs@86700000 {

			compatible = "qcom,rmtfs-mem";



			size = <0x0 0x200000>;

			alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>;

			no-map;



			qcom,client-id = <1>;

			qcom,vmid = <15>;

		};

	};



	cpus {
@@ -232,10 +243,10 @@ 


	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;

	};



	clocks {
@@ -497,8 +508,8 @@ 
		blsp2_spi5: spi@75ba000{

			compatible = "qcom,spi-qup-v2.2.1";

			reg = <0x075ba000 0x600>;

			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>,

			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP2_QUP6_SPI_APPS_CLK>,

				 <&gcc GCC_BLSP2_AHB_CLK>;

			clock-names = "core", "iface";

			pinctrl-names = "default", "sleep";