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Commit 22e43390 authored by Scott Wood's avatar Scott Wood Committed by Will Deacon
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arm64: arch_timer: Add device tree binding for A-008585 erratum 



This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward.  So, describe it
in the device tree.

Signed-off-by: default avatarScott Wood <oss@buserror.net>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent ca219452

Documentation/devicetree/bindings/arm/arch_timer.txt

+6 −0
Original line number Diff line number Diff line
@@ -25,6 +25,12 @@ to deliver its interrupts via SPIs. 
- always-on : a boolean property. If present, the timer is powered through an

  always-on power domain, therefore it never loses context.



- fsl,erratum-a008585 : A boolean property. Indicates the presence of

  QorIQ erratum A-008585, which says that reading the counter is

  unreliable unless the same value is returned by back-to-back reads.

  This also affects writes to the tval register, due to the implicit

  counter read.



** Optional properties:



- arm,cpu-registers-not-fw-configured : Firmware does not initialize