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Commit 216fa18f authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'ppc_bpf' 



Denis Kirjanov says:

====================
bpf: Enable BPF JIT on ppc32

This patch series enables BPF JIT on ppc32. There are relatevily
few chnages in the code to make it work.

All test_bpf tests passed both on 7447a and P2041-based machines.

Changelog:
v1 - > v2: Reordered Kconfig patch in the series
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 6d91147d eb84bab0

arch/powerpc/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -126,7 +126,7 @@ config PPC 
	select IRQ_FORCED_THREADING

	select HAVE_RCU_TABLE_FREE if SMP

	select HAVE_SYSCALL_TRACEPOINTS

	select HAVE_BPF_JIT if PPC64

	select HAVE_BPF_JIT

	select HAVE_ARCH_JUMP_LABEL

	select ARCH_HAVE_NMI_SAFE_CMPXCHG

	select ARCH_HAS_GCOV_PROFILE_ALL

arch/powerpc/include/asm/asm-compat.h

+4 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ 
#define PPC_STL		stringify_in_c(std)

#define PPC_STLU	stringify_in_c(stdu)

#define PPC_LCMPI	stringify_in_c(cmpdi)

#define PPC_LCMPLI	stringify_in_c(cmpldi)

#define PPC_LCMP	stringify_in_c(cmpd)

#define PPC_LONG	stringify_in_c(.llong)

#define PPC_LONG_ALIGN	stringify_in_c(.balign 8)

#define PPC_TLNEI	stringify_in_c(tdnei)
@@ -52,6 +54,8 @@ 
#define PPC_STL		stringify_in_c(stw)

#define PPC_STLU	stringify_in_c(stwu)

#define PPC_LCMPI	stringify_in_c(cmpwi)

#define PPC_LCMPLI	stringify_in_c(cmplwi)

#define PPC_LCMP	stringify_in_c(cmpw)

#define PPC_LONG	stringify_in_c(.long)

#define PPC_LONG_ALIGN	stringify_in_c(.balign 4)

#define PPC_TLNEI	stringify_in_c(twnei)

arch/powerpc/include/asm/ppc-opcode.h

+2 −0
Original line number Diff line number Diff line
@@ -212,6 +212,8 @@ 
#define PPC_INST_LWZ			0x80000000

#define PPC_INST_STD			0xf8000000

#define PPC_INST_STDU			0xf8000001

#define PPC_INST_STW			0x90000000

#define PPC_INST_STWU			0x94000000

#define PPC_INST_MFLR			0x7c0802a6

#define PPC_INST_MTLR			0x7c0803a6

#define PPC_INST_CMPWI			0x2c000000

arch/powerpc/net/Makefile

+1 −1
Original line number Diff line number Diff line 
#

# Arch-specific network modules

#

obj-$(CONFIG_BPF_JIT) += bpf_jit_64.o bpf_jit_comp.o
 
obj-$(CONFIG_BPF_JIT) += bpf_jit_asm.o bpf_jit_comp.o

arch/powerpc/net/bpf_jit.h

+63 −1
Original line number Diff line number Diff line
@@ -10,12 +10,25 @@ 
#ifndef _BPF_JIT_H

#define _BPF_JIT_H



#ifdef CONFIG_PPC64

#define BPF_PPC_STACK_R3_OFF	48

#define BPF_PPC_STACK_LOCALS	32

#define BPF_PPC_STACK_BASIC	(48+64)

#define BPF_PPC_STACK_SAVE	(18*8)

#define BPF_PPC_STACKFRAME	(BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \

				 BPF_PPC_STACK_SAVE)

#define BPF_PPC_SLOWPATH_FRAME	(48+64)

#else

#define BPF_PPC_STACK_R3_OFF	24

#define BPF_PPC_STACK_LOCALS	16

#define BPF_PPC_STACK_BASIC	(24+32)

#define BPF_PPC_STACK_SAVE	(18*4)

#define BPF_PPC_STACKFRAME	(BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \

				 BPF_PPC_STACK_SAVE)

#define BPF_PPC_SLOWPATH_FRAME	(24+32)

#endif



#define REG_SZ         (BITS_PER_LONG/8)



/*

 * Generated code register usage:
@@ -57,7 +70,11 @@ DECLARE_LOAD_FUNC(sk_load_half); 
DECLARE_LOAD_FUNC(sk_load_byte);

DECLARE_LOAD_FUNC(sk_load_byte_msh);



#ifdef CONFIG_PPC64

#define FUNCTION_DESCR_SIZE	24

#else

#define FUNCTION_DESCR_SIZE	0

#endif



/*

 * 16-bit immediate helper macros: HA() is for use with sign-extending instrs
@@ -86,7 +103,12 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
#define PPC_LIS(r, i)		PPC_ADDIS(r, 0, i)

#define PPC_STD(r, base, i)	EMIT(PPC_INST_STD | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))



#define PPC_STDU(r, base, i)	EMIT(PPC_INST_STDU | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))

#define PPC_STW(r, base, i)	EMIT(PPC_INST_STW | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))

#define PPC_STWU(r, base, i)	EMIT(PPC_INST_STWU | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))



#define PPC_LBZ(r, base, i)	EMIT(PPC_INST_LBZ | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))
@@ -98,6 +120,17 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
				     ___PPC_RA(base) | IMM_L(i))

#define PPC_LHBRX(r, base, b)	EMIT(PPC_INST_LHBRX | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))



#ifdef CONFIG_PPC64

#define PPC_BPF_LL(r, base, i) do { PPC_LD(r, base, i); } while(0)

#define PPC_BPF_STL(r, base, i) do { PPC_STD(r, base, i); } while(0)

#define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0)

#else

#define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0)

#define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0)

#define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)

#endif



/* Convenience helpers for the above with 'far' offsets: */

#define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i);   \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
@@ -115,6 +148,29 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

			PPC_LHZ(r, r, IMM_L(i)); } } while(0)



#ifdef CONFIG_PPC64

#define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0)

#else

#define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0)

#endif



#ifdef CONFIG_SMP

#ifdef CONFIG_PPC64

#define PPC_BPF_LOAD_CPU(r)		\

	do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2);	\

		PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index));		\

	} while (0)

#else

#define PPC_BPF_LOAD_CPU(r)     \

	do { BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);			\

		PPC_LHZ_OFFS(r, (1 & ~(THREAD_SIZE - 1)),							\

				offsetof(struct thread_info, cpu));							\

	} while(0)

#endif

#else

#define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0)

#endif



#define PPC_CMPWI(a, i)		EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPDI(a, i)		EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPLWI(a, i)	EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))
@@ -196,6 +252,12 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
				PPC_ORI(d, d, (uintptr_t)(i) & 0xffff);	      \

		} } while (0);



#ifdef CONFIG_PPC64

#define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0)

#else

#define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0)

#endif



#define PPC_LHBRX_OFFS(r, base, i) \

		do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0)

#ifdef __LITTLE_ENDIAN__