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Commit 20c8838b authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915/psr: Restrict single-shot updates to the PSR pipe 



The frontbuffer code gives us accurate information about activity,
let's use it. Again this should avoid unecessary updates when multiple
screens are on.

Also realign function paramaters, I couldn't resist that bit of OCD.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Durgadoss R <durgadoss.r@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parent ec76d629

drivers/gpu/drm/i915/intel_drv.h

+4 −3
Original line number Diff line number Diff line
@@ -1311,7 +1311,8 @@ void intel_psr_invalidate(struct drm_device *dev, 
void intel_psr_flush(struct drm_device *dev,

		     unsigned frontbuffer_bits);

void intel_psr_init(struct drm_device *dev);

void intel_psr_single_frame_update(struct drm_device *dev);

void intel_psr_single_frame_update(struct drm_device *dev,

				   unsigned frontbuffer_bits);



/* intel_runtime_pm.c */

int intel_power_domains_init(struct drm_i915_private *);

drivers/gpu/drm/i915/intel_frontbuffer.c

+1 −1
Original line number Diff line number Diff line
@@ -243,7 +243,7 @@ void intel_frontbuffer_flip_prepare(struct drm_device *dev, 
	dev_priv->fb_tracking.busy_bits &= ~frontbuffer_bits;

	mutex_unlock(&dev_priv->fb_tracking.lock);



	intel_psr_single_frame_update(dev);

	intel_psr_single_frame_update(dev, frontbuffer_bits);

}



/**

drivers/gpu/drm/i915/intel_psr.c

+13 −9
Original line number Diff line number Diff line
@@ -596,13 +596,15 @@ static void intel_psr_exit(struct drm_device *dev) 
/**

 * intel_psr_single_frame_update - Single Frame Update

 * @dev: DRM device

 * @frontbuffer_bits: frontbuffer plane tracking bits

 *

 * Some platforms support a single frame update feature that is used to

 * send and update only one frame on Remote Frame Buffer.

 * So far it is only implemented for Valleyview and Cherryview because

 * hardware requires this to be done before a page flip.

 */

void intel_psr_single_frame_update(struct drm_device *dev)

void intel_psr_single_frame_update(struct drm_device *dev,

				   unsigned frontbuffer_bits)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_crtc *crtc;
@@ -624,6 +626,8 @@ void intel_psr_single_frame_update(struct drm_device *dev) 


	crtc = dp_to_dig_port(dev_priv->psr.enabled)->base.base.crtc;

	pipe = to_intel_crtc(crtc)->pipe;



	if (frontbuffer_bits & INTEL_FRONTBUFFER_ALL_MASK(pipe)) {

		val = I915_READ(VLV_PSRCTL(pipe));



		/*
@@ -631,7 +635,7 @@ void intel_psr_single_frame_update(struct drm_device *dev) 
		 * This bit will be self-clear when it gets to the PSR active state.

		 */

		I915_WRITE(VLV_PSRCTL(pipe), val | VLV_EDP_PSR_SINGLE_FRAME_UPDATE);



	}

	mutex_unlock(&dev_priv->psr.lock);

}