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Commit 1efb92a3 authored by Hai Li's avatar Hai Li Committed by Rob Clark
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drm/msm/mdp5: Always generate active-high sync signals for DSI 



DSI video mode engine can only take active-high sync signals. This
change prevents MDP5 sending active-low sync signals to DSI in any
case.

Signed-off-by: default avatarHai Li <hali@codeaurora.org>
Tested-by: default avatarArchit Taneja <architt@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 964a0754

drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c

+8 −4
Original line number Original line Diff line number Diff line
@@ -144,10 +144,14 @@ static void mdp5_encoder_mode_set(struct drm_encoder *encoder, 
			mode->type, mode->flags);

			mode->type, mode->flags);





	ctrl_pol = 0;

	ctrl_pol = 0;



	/* DSI controller cannot handle active-low sync signals. */

	if (mdp5_encoder->intf.type != INTF_DSI) {

		if (mode->flags & DRM_MODE_FLAG_NHSYNC)

		if (mode->flags & DRM_MODE_FLAG_NHSYNC)

			ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;

			ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;

		if (mode->flags & DRM_MODE_FLAG_NVSYNC)

		if (mode->flags & DRM_MODE_FLAG_NVSYNC)

			ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;

			ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;

	}

	/* probably need to get DATA_EN polarity from panel.. */

	/* probably need to get DATA_EN polarity from panel.. */





	dtv_hsync_skew = 0;  /* get this from panel? */

	dtv_hsync_skew = 0;  /* get this from panel? */