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Commit 1e09a73f authored by Miquel Raynal's avatar Miquel Raynal Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: use reworked NAND controller driver on Armada 7K 



Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.

Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent c137ba9b

arch/arm64/boot/dts/marvell/armada-7040-db.dts

+32 −20
Original line number Diff line number Diff line
@@ -123,35 +123,47 @@ 
	};

};



&cp0_nand {

&cp0_nand_controller {

	/*

	 * SPI on CPM and NAND have common pins on this board. We can

	 * use only one at a time. To enable the NAND (whihch will

	 * use only one at a time. To enable the NAND (which will

	 * disable the SPI), the "status = "okay";" line have to be

	 * added here.

	 */

	num-cs = <1>;

	pinctrl-0 = <&nand_pins>, <&nand_rb>;

	pinctrl-names = "default";



	nand@0 {

		reg = <0>;

		label = "pxa3xx_nand-0";

		nand-rb = <0>;

		nand-on-flash-bbt;

		nand-ecc-strength = <4>;

		nand-ecc-step-size = <512>;

	marvell,nand-enable-arbiter;

	nand-on-flash-bbt;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "U-Boot";

				reg = <0 0x200000>;

			};



			partition@200000 {

				label = "Linux";

				reg = <0x200000 0xe00000>;

			};



			partition@1000000 {

				label = "Filesystem";

				reg = <0x1000000 0x3f000000>;

			};

};



		};

	};

};



&cp0_spi1 {

	status = "okay";

arch/arm64/boot/dts/marvell/armada-cp110.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -337,17 +337,17 @@ 
			status = "disabled";

		};



		CP110_LABEL(nand): nand@720000 {

		CP110_LABEL(nand_controller): nand@720000 {

			/*

			* Due to the limitation of the pins available

			* this controller is only usable on the CPM

			* for A7K and on the CPS for A8K.

			*/

			compatible = "marvell,armada-8k-nand",

			"marvell,armada370-nand";

			compatible = "marvell,armada-8k-nand-controller",

				"marvell,armada370-nand-controller";

			reg = <0x720000 0x54>;

			#address-cells = <1>;

			#size-cells = <1>;

			#size-cells = <0>;

			interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&CP110_LABEL(clk) 1 2>;

			marvell,system-controller = <&CP110_LABEL(syscon0)>;