Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1d19023f authored by Ganesh Goudar's avatar Ganesh Goudar Committed by David S. Miller
Browse files

cxgb4: change the port capability bits definition 



MDI Port Capabilities bit definitions were inconsistent with
regard to the MDI enum values. 2 bits used to define MDI in
the port capabilities are not really separable, it's a 2-bit
field with 4 different values. Change the port capability bit
definitions to be "AUTO" and "STRAIGHT" in order to get them
to line up with the enum's.

Signed-off-by: default avatarCasey Leedom <leedom@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5ee6ad20

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

+2 −2
Original line number Diff line number Diff line
@@ -3941,8 +3941,8 @@ static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) 
	CAP16_TO_CAP32(FC_RX);

	CAP16_TO_CAP32(FC_TX);

	CAP16_TO_CAP32(ANEG);

	CAP16_TO_CAP32(MDIX);

	CAP16_TO_CAP32(MDIAUTO);

	CAP16_TO_CAP32(MDISTRAIGHT);

	CAP16_TO_CAP32(FEC_RS);

	CAP16_TO_CAP32(FEC_BASER_RS);

	CAP16_TO_CAP32(802_3_PAUSE);
@@ -3982,8 +3982,8 @@ static fw_port_cap16_t fwcaps32_to_caps16(fw_port_cap32_t caps32) 
	CAP32_TO_CAP16(802_3_PAUSE);

	CAP32_TO_CAP16(802_3_ASM_DIR);

	CAP32_TO_CAP16(ANEG);

	CAP32_TO_CAP16(MDIX);

	CAP32_TO_CAP16(MDIAUTO);

	CAP32_TO_CAP16(MDISTRAIGHT);

	CAP32_TO_CAP16(FEC_RS);

	CAP32_TO_CAP16(FEC_BASER_RS);

drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

+4 −4
Original line number Diff line number Diff line
@@ -2471,8 +2471,8 @@ enum fw_port_cap { 
	FW_PORT_CAP_FC_RX		= 0x0040,

	FW_PORT_CAP_FC_TX		= 0x0080,

	FW_PORT_CAP_ANEG		= 0x0100,

	FW_PORT_CAP_MDIX		= 0x0200,

	FW_PORT_CAP_MDIAUTO		= 0x0400,

	FW_PORT_CAP_MDIAUTO		= 0x0200,

	FW_PORT_CAP_MDISTRAIGHT		= 0x0400,

	FW_PORT_CAP_FEC_RS		= 0x0800,

	FW_PORT_CAP_FEC_BASER_RS	= 0x1000,

	FW_PORT_CAP_FEC_RESERVED	= 0x2000,
@@ -2515,8 +2515,8 @@ enum fw_port_mdi { 
#define	FW_PORT_CAP32_802_3_PAUSE	0x00040000UL

#define	FW_PORT_CAP32_802_3_ASM_DIR	0x00080000UL

#define	FW_PORT_CAP32_ANEG		0x00100000UL

#define	FW_PORT_CAP32_MDIX		0x00200000UL

#define	FW_PORT_CAP32_MDIAUTO		0x00400000UL

#define	FW_PORT_CAP32_MDIAUTO		0x00200000UL

#define	FW_PORT_CAP32_MDISTRAIGHT	0x00400000UL

#define	FW_PORT_CAP32_FEC_RS		0x00800000UL

#define	FW_PORT_CAP32_FEC_BASER_RS	0x01000000UL

#define	FW_PORT_CAP32_FEC_RESERVED1	0x02000000UL

drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c

+1 −1
Original line number Diff line number Diff line
@@ -341,8 +341,8 @@ static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) 
	CAP16_TO_CAP32(FC_RX);

	CAP16_TO_CAP32(FC_TX);

	CAP16_TO_CAP32(ANEG);

	CAP16_TO_CAP32(MDIX);

	CAP16_TO_CAP32(MDIAUTO);

	CAP16_TO_CAP32(MDISTRAIGHT);

	CAP16_TO_CAP32(FEC_RS);

	CAP16_TO_CAP32(FEC_BASER_RS);

	CAP16_TO_CAP32(802_3_PAUSE);

drivers/scsi/csiostor/csio_hw.c

+1 −1
Original line number Diff line number Diff line
@@ -1500,8 +1500,8 @@ fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) 
	CAP16_TO_CAP32(FC_RX);

	CAP16_TO_CAP32(FC_TX);

	CAP16_TO_CAP32(ANEG);

	CAP16_TO_CAP32(MDIX);

	CAP16_TO_CAP32(MDIAUTO);

	CAP16_TO_CAP32(MDISTRAIGHT);

	CAP16_TO_CAP32(FEC_RS);

	CAP16_TO_CAP32(FEC_BASER_RS);

	CAP16_TO_CAP32(802_3_PAUSE);