Loading include/asm-ppc/irq.h→include/asm-powerpc/irq.h +117 −41 Original line number Diff line number Diff line #ifdef __KERNEL__ #ifndef _ASM_IRQ_H #define _ASM_IRQ_H #ifndef _ASM_POWERPC_IRQ_H #define _ASM_POWERPC_IRQ_H /* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/config.h> #include <asm/machdep.h> /* ppc_md */ #include <linux/threads.h> #include <asm/types.h> #include <asm/atomic.h> /* this number is used when no interrupt has been assigned */ #define NO_IRQ (-1) /* * These constants are used for passing information about interrupt * signal polarity and level/edge sensing to the low-level PIC chip Loading @@ -30,6 +42,44 @@ #define for_each_irq(i) \ for ((i) = 0; (i) < NR_IRQS; ++(i)) #ifdef CONFIG_PPC64 /* * Maximum number of interrupt sources that we can handle. */ #define NR_IRQS 512 /* Interrupt numbers are virtual in case they are sparsely * distributed by the hardware. */ extern unsigned int virt_irq_to_real_map[NR_IRQS]; /* Create a mapping for a real_irq if it doesn't already exist. * Return the virtual irq as a convenience. */ int virt_irq_create_mapping(unsigned int real_irq); void virt_irq_init(void); static inline unsigned int virt_irq_to_real(unsigned int virt_irq) { return virt_irq_to_real_map[virt_irq]; } extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); /* * List of interrupt controllers. */ #define IC_INVALID 0 #define IC_OPEN_PIC 1 #define IC_PPC_XIC 2 #define IC_BPA_IIC 3 #define IC_ISERIES 4 extern u64 ppc64_interrupt_controller; #else /* 32-bit */ #if defined(CONFIG_40x) #include <asm/ibm4xx.h> Loading Loading @@ -72,11 +122,6 @@ #define NR_UIC_IRQS UIC_WIDTH #define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) #endif static __inline__ int irq_canonicalize(int irq) { return (irq); } #elif defined(CONFIG_44x) #include <asm/ibm44x.h> Loading @@ -84,12 +129,6 @@ irq_canonicalize(int irq) #define NR_UIC_IRQS 32 #define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) static __inline__ int irq_canonicalize(int irq) { return (irq); } #elif defined(CONFIG_8xx) /* Now include the board configuration specific associations. Loading Loading @@ -176,20 +215,9 @@ irq_canonicalize(int irq) */ #define mk_int_int_mask(IL) (1 << (7 - (IL/2))) /* always the same on 8xx -- Cort */ static __inline__ int irq_canonicalize(int irq) { return irq; } #elif defined(CONFIG_83xx) #include <asm/mpc83xx.h> static __inline__ int irq_canonicalize(int irq) { return irq; } #define NR_IRQS (NR_IPIC_INTS) #elif defined(CONFIG_85xx) Loading Loading @@ -313,17 +341,13 @@ static __inline__ int irq_canonicalize(int irq) #define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) #define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) static __inline__ int irq_canonicalize(int irq) { return irq; } #else /* CONFIG_40x + CONFIG_8xx */ /* * this is the # irq's for all ppc arch's (pmac/chrp/prep) * so it is the max of them all */ #define NR_IRQS 256 #define __DO_IRQ_CANON 1 #ifndef CONFIG_8260 Loading Loading @@ -400,25 +424,77 @@ static __inline__ int irq_canonicalize(int irq) #endif /* CONFIG_8260 */ #endif #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) /* pedantic: these are long because they are used with set_bit --RR */ extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; extern atomic_t ppc_n_lost_interrupts; #endif /* * This gets called from serial.c, which is now used on * powermacs as well as prep/chrp boxes. * Prep and chrp both have cascaded 8259 PICs. * Because many systems have two overlapping names spaces for * interrupts (ISA and XICS for example), and the ISA interrupts * have historically not been easy to renumber, we allow ISA * interrupts to take values 0 - 15, and shift up the remaining * interrupts by 0x10. */ #define NUM_ISA_INTERRUPTS 0x10 extern int __irq_offset_value; static inline int irq_offset_up(int irq) { return(irq + __irq_offset_value); } static inline int irq_offset_down(int irq) { return(irq - __irq_offset_value); } static inline int irq_offset_value(void) { return __irq_offset_value; } #ifdef __DO_IRQ_CANON extern int ppc_do_canonicalize_irqs; #else #define ppc_do_canonicalize_irqs 0 #endif static __inline__ int irq_canonicalize(int irq) { if (ppc_md.irq_canonicalize) return ppc_md.irq_canonicalize(irq); if (ppc_do_canonicalize_irqs && irq == 2) irq = 9; return irq; } #endif extern int distribute_irqs; #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) /* pedantic: these are long because they are used with set_bit --RR */ extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; extern atomic_t ppc_n_lost_interrupts; struct irqaction; struct pt_regs; #ifdef CONFIG_IRQSTACKS /* * Per-cpu stacks for handling hard and soft interrupts. */ extern struct thread_info *hardirq_ctx[NR_CPUS]; extern struct thread_info *softirq_ctx[NR_CPUS]; extern void irq_ctx_init(void); extern void call_do_softirq(struct thread_info *tp); extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, struct irqaction *action, struct thread_info *tp); #define __ARCH_HAS_DO_SOFTIRQ #else #define irq_ctx_init() #endif /* CONFIG_IRQSTACKS */ #endif /* _ASM_IRQ_H */ #endif /* __KERNEL__ */ include/asm-ppc64/irq.hdeleted 100644 → 0 +0 −120 Original line number Diff line number Diff line #ifdef __KERNEL__ #ifndef _ASM_IRQ_H #define _ASM_IRQ_H /* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/config.h> #include <linux/threads.h> /* * Maximum number of interrupt sources that we can handle. */ #define NR_IRQS 512 /* this number is used when no interrupt has been assigned */ #define NO_IRQ (-1) /* * These constants are used for passing information about interrupt * signal polarity and level/edge sensing to the low-level PIC chip * drivers. */ #define IRQ_SENSE_MASK 0x1 #define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ #define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ #define IRQ_POLARITY_MASK 0x2 #define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ #define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ /* * IRQ line status macro IRQ_PER_CPU is used */ #define ARCH_HAS_IRQ_PER_CPU #define get_irq_desc(irq) (&irq_desc[(irq)]) /* Define a way to iterate across irqs. */ #define for_each_irq(i) \ for ((i) = 0; (i) < NR_IRQS; ++(i)) /* Interrupt numbers are virtual in case they are sparsely * distributed by the hardware. */ extern unsigned int virt_irq_to_real_map[NR_IRQS]; /* Create a mapping for a real_irq if it doesn't already exist. * Return the virtual irq as a convenience. */ int virt_irq_create_mapping(unsigned int real_irq); void virt_irq_init(void); static inline unsigned int virt_irq_to_real(unsigned int virt_irq) { return virt_irq_to_real_map[virt_irq]; } extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); /* * Because many systems have two overlapping names spaces for * interrupts (ISA and XICS for example), and the ISA interrupts * have historically not been easy to renumber, we allow ISA * interrupts to take values 0 - 15, and shift up the remaining * interrupts by 0x10. */ #define NUM_ISA_INTERRUPTS 0x10 extern int __irq_offset_value; static inline int irq_offset_up(int irq) { return(irq + __irq_offset_value); } static inline int irq_offset_down(int irq) { return(irq - __irq_offset_value); } static inline int irq_offset_value(void) { return __irq_offset_value; } static __inline__ int irq_canonicalize(int irq) { return irq; } extern int distribute_irqs; struct irqaction; struct pt_regs; #ifdef CONFIG_IRQSTACKS /* * Per-cpu stacks for handling hard and soft interrupts. */ extern struct thread_info *hardirq_ctx[NR_CPUS]; extern struct thread_info *softirq_ctx[NR_CPUS]; extern void irq_ctx_init(void); extern void call_do_softirq(struct thread_info *tp); extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, struct irqaction *action, struct thread_info *tp); #define __ARCH_HAS_DO_SOFTIRQ #else #define irq_ctx_init() #endif /* CONFIG_IRQSTACKS */ #endif /* _ASM_IRQ_H */ #endif /* __KERNEL__ */ Loading
include/asm-ppc/irq.h→include/asm-powerpc/irq.h +117 −41 Original line number Diff line number Diff line #ifdef __KERNEL__ #ifndef _ASM_IRQ_H #define _ASM_IRQ_H #ifndef _ASM_POWERPC_IRQ_H #define _ASM_POWERPC_IRQ_H /* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/config.h> #include <asm/machdep.h> /* ppc_md */ #include <linux/threads.h> #include <asm/types.h> #include <asm/atomic.h> /* this number is used when no interrupt has been assigned */ #define NO_IRQ (-1) /* * These constants are used for passing information about interrupt * signal polarity and level/edge sensing to the low-level PIC chip Loading @@ -30,6 +42,44 @@ #define for_each_irq(i) \ for ((i) = 0; (i) < NR_IRQS; ++(i)) #ifdef CONFIG_PPC64 /* * Maximum number of interrupt sources that we can handle. */ #define NR_IRQS 512 /* Interrupt numbers are virtual in case they are sparsely * distributed by the hardware. */ extern unsigned int virt_irq_to_real_map[NR_IRQS]; /* Create a mapping for a real_irq if it doesn't already exist. * Return the virtual irq as a convenience. */ int virt_irq_create_mapping(unsigned int real_irq); void virt_irq_init(void); static inline unsigned int virt_irq_to_real(unsigned int virt_irq) { return virt_irq_to_real_map[virt_irq]; } extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); /* * List of interrupt controllers. */ #define IC_INVALID 0 #define IC_OPEN_PIC 1 #define IC_PPC_XIC 2 #define IC_BPA_IIC 3 #define IC_ISERIES 4 extern u64 ppc64_interrupt_controller; #else /* 32-bit */ #if defined(CONFIG_40x) #include <asm/ibm4xx.h> Loading Loading @@ -72,11 +122,6 @@ #define NR_UIC_IRQS UIC_WIDTH #define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) #endif static __inline__ int irq_canonicalize(int irq) { return (irq); } #elif defined(CONFIG_44x) #include <asm/ibm44x.h> Loading @@ -84,12 +129,6 @@ irq_canonicalize(int irq) #define NR_UIC_IRQS 32 #define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) static __inline__ int irq_canonicalize(int irq) { return (irq); } #elif defined(CONFIG_8xx) /* Now include the board configuration specific associations. Loading Loading @@ -176,20 +215,9 @@ irq_canonicalize(int irq) */ #define mk_int_int_mask(IL) (1 << (7 - (IL/2))) /* always the same on 8xx -- Cort */ static __inline__ int irq_canonicalize(int irq) { return irq; } #elif defined(CONFIG_83xx) #include <asm/mpc83xx.h> static __inline__ int irq_canonicalize(int irq) { return irq; } #define NR_IRQS (NR_IPIC_INTS) #elif defined(CONFIG_85xx) Loading Loading @@ -313,17 +341,13 @@ static __inline__ int irq_canonicalize(int irq) #define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) #define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) static __inline__ int irq_canonicalize(int irq) { return irq; } #else /* CONFIG_40x + CONFIG_8xx */ /* * this is the # irq's for all ppc arch's (pmac/chrp/prep) * so it is the max of them all */ #define NR_IRQS 256 #define __DO_IRQ_CANON 1 #ifndef CONFIG_8260 Loading Loading @@ -400,25 +424,77 @@ static __inline__ int irq_canonicalize(int irq) #endif /* CONFIG_8260 */ #endif #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) /* pedantic: these are long because they are used with set_bit --RR */ extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; extern atomic_t ppc_n_lost_interrupts; #endif /* * This gets called from serial.c, which is now used on * powermacs as well as prep/chrp boxes. * Prep and chrp both have cascaded 8259 PICs. * Because many systems have two overlapping names spaces for * interrupts (ISA and XICS for example), and the ISA interrupts * have historically not been easy to renumber, we allow ISA * interrupts to take values 0 - 15, and shift up the remaining * interrupts by 0x10. */ #define NUM_ISA_INTERRUPTS 0x10 extern int __irq_offset_value; static inline int irq_offset_up(int irq) { return(irq + __irq_offset_value); } static inline int irq_offset_down(int irq) { return(irq - __irq_offset_value); } static inline int irq_offset_value(void) { return __irq_offset_value; } #ifdef __DO_IRQ_CANON extern int ppc_do_canonicalize_irqs; #else #define ppc_do_canonicalize_irqs 0 #endif static __inline__ int irq_canonicalize(int irq) { if (ppc_md.irq_canonicalize) return ppc_md.irq_canonicalize(irq); if (ppc_do_canonicalize_irqs && irq == 2) irq = 9; return irq; } #endif extern int distribute_irqs; #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) /* pedantic: these are long because they are used with set_bit --RR */ extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; extern atomic_t ppc_n_lost_interrupts; struct irqaction; struct pt_regs; #ifdef CONFIG_IRQSTACKS /* * Per-cpu stacks for handling hard and soft interrupts. */ extern struct thread_info *hardirq_ctx[NR_CPUS]; extern struct thread_info *softirq_ctx[NR_CPUS]; extern void irq_ctx_init(void); extern void call_do_softirq(struct thread_info *tp); extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, struct irqaction *action, struct thread_info *tp); #define __ARCH_HAS_DO_SOFTIRQ #else #define irq_ctx_init() #endif /* CONFIG_IRQSTACKS */ #endif /* _ASM_IRQ_H */ #endif /* __KERNEL__ */
include/asm-ppc64/irq.hdeleted 100644 → 0 +0 −120 Original line number Diff line number Diff line #ifdef __KERNEL__ #ifndef _ASM_IRQ_H #define _ASM_IRQ_H /* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/config.h> #include <linux/threads.h> /* * Maximum number of interrupt sources that we can handle. */ #define NR_IRQS 512 /* this number is used when no interrupt has been assigned */ #define NO_IRQ (-1) /* * These constants are used for passing information about interrupt * signal polarity and level/edge sensing to the low-level PIC chip * drivers. */ #define IRQ_SENSE_MASK 0x1 #define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ #define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ #define IRQ_POLARITY_MASK 0x2 #define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ #define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ /* * IRQ line status macro IRQ_PER_CPU is used */ #define ARCH_HAS_IRQ_PER_CPU #define get_irq_desc(irq) (&irq_desc[(irq)]) /* Define a way to iterate across irqs. */ #define for_each_irq(i) \ for ((i) = 0; (i) < NR_IRQS; ++(i)) /* Interrupt numbers are virtual in case they are sparsely * distributed by the hardware. */ extern unsigned int virt_irq_to_real_map[NR_IRQS]; /* Create a mapping for a real_irq if it doesn't already exist. * Return the virtual irq as a convenience. */ int virt_irq_create_mapping(unsigned int real_irq); void virt_irq_init(void); static inline unsigned int virt_irq_to_real(unsigned int virt_irq) { return virt_irq_to_real_map[virt_irq]; } extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); /* * Because many systems have two overlapping names spaces for * interrupts (ISA and XICS for example), and the ISA interrupts * have historically not been easy to renumber, we allow ISA * interrupts to take values 0 - 15, and shift up the remaining * interrupts by 0x10. */ #define NUM_ISA_INTERRUPTS 0x10 extern int __irq_offset_value; static inline int irq_offset_up(int irq) { return(irq + __irq_offset_value); } static inline int irq_offset_down(int irq) { return(irq - __irq_offset_value); } static inline int irq_offset_value(void) { return __irq_offset_value; } static __inline__ int irq_canonicalize(int irq) { return irq; } extern int distribute_irqs; struct irqaction; struct pt_regs; #ifdef CONFIG_IRQSTACKS /* * Per-cpu stacks for handling hard and soft interrupts. */ extern struct thread_info *hardirq_ctx[NR_CPUS]; extern struct thread_info *softirq_ctx[NR_CPUS]; extern void irq_ctx_init(void); extern void call_do_softirq(struct thread_info *tp); extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, struct irqaction *action, struct thread_info *tp); #define __ARCH_HAS_DO_SOFTIRQ #else #define irq_ctx_init() #endif /* CONFIG_IRQSTACKS */ #endif /* _ASM_IRQ_H */ #endif /* __KERNEL__ */
Paul Mackerras <paulus@samba.org>Paul Mackerras <paulus@samba.org>