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Commit 1a3d1898 authored by Dave Gordon's avatar Dave Gordon Committed by Tvrtko Ursulin
Browse files

drm/i915/guc: distinguish HAS_GUC() from HAS_GUC_UCODE/HAS_GUC_SCHED



For now, anything with a GuC requires uCode loading, and then supports
command submission once loaded. But these are logically distinct from
simply "having a GuC", so we need a separate macro for the latter. Then,
various tests should use this new macro rather than HAS_GUC_UCODE() or
testing enable_guc_submission.

v4:
    Added a couple more uses of the new macro.

Signed-off-by: default avatarDave Gordon <david.s.gordon@intel.com>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
parent f09d675f
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+8 −2
Original line number Diff line number Diff line
@@ -2802,8 +2802,14 @@ struct drm_i915_cmd_table {

#define HAS_CSR(dev)	(IS_GEN9(dev))

#define HAS_GUC_UCODE(dev)	(IS_GEN9(dev) && !IS_KABYLAKE(dev))
#define HAS_GUC_SCHED(dev)	(IS_GEN9(dev) && !IS_KABYLAKE(dev))
/*
 * For now, anything with a GuC requires uCode loading, and then supports
 * command submission once loaded. But these are logically independent
 * properties, so we have separate macros to test them.
 */
#define HAS_GUC(dev)		(IS_GEN9(dev) && !IS_KABYLAKE(dev))
#define HAS_GUC_UCODE(dev)	(HAS_GUC(dev))
#define HAS_GUC_SCHED(dev)	(HAS_GUC(dev))

#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
				    INTEL_INFO(dev)->gen >= 8)
+1 −1
Original line number Diff line number Diff line
@@ -4883,7 +4883,7 @@ i915_gem_init_hw(struct drm_device *dev)
	intel_mocs_init_l3cc_table(dev);

	/* We can't enable contexts until all firmware is loaded */
	if (HAS_GUC_UCODE(dev)) {
	if (HAS_GUC(dev)) {
		ret = intel_guc_setup(dev);
		if (ret) {
			DRM_ERROR("Failed to initialize GuC, error %d\n", ret);
+1 −1
Original line number Diff line number Diff line
@@ -5039,7 +5039,7 @@ static void gen9_enable_rc6(struct drm_i915_private *dev_priv)
	for_each_engine(engine, dev_priv)
		I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10);

	if (HAS_GUC_UCODE(dev_priv))
	if (HAS_GUC(dev_priv))
		I915_WRITE(GUC_MAX_IDLE_COUNT, 0xA);

	I915_WRITE(GEN6_RC_SLEEP, 0);
+1 −1
Original line number Diff line number Diff line
@@ -1715,7 +1715,7 @@ int intel_guc_reset(struct drm_i915_private *dev_priv)
	int ret;
	unsigned long irqflags;

	if (!i915.enable_guc_submission)
	if (!HAS_GUC(dev_priv))
		return -EINVAL;

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);