[ARM] 3949/2: AT91: SAM9 timer driver

# CPU-specific support

obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.c

obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o

obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o

obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o

obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o

# AT91RM9200 board-specific support

obj-$(CONFIG_MACH_ONEARM)	+= board-1arm.o

/*

 * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c

 *

 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France

 * Revision	 2005 M. Nicolas Diremdjian, ATMEL Rousset, France

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/irq.h>

#include <linux/kernel.h>

#include <linux/sched.h>

#include <linux/time.h>

#include <asm/hardware.h>

#include <asm/io.h>

#include <asm/mach/time.h>

#include <asm/arch/at91_pit.h>

#define PIT_CPIV(x)	((x) & AT91_PIT_CPIV)

#define PIT_PICNT(x)	(((x) & AT91_PIT_PICNT) >> 20)

/*

 * Returns number of microseconds since last timer interrupt.  Note that interrupts

 * will have been disabled by do_gettimeofday()

 *  'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.

 *  'tick' is usecs per jiffy (linux/timex.h).

 */

static unsigned long at91sam926x_gettimeoffset(void)

{

	unsigned long elapsed;

	unsigned long t = at91_sys_read(AT91_PIT_PIIR);

	elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t);		/* hardware clock cycles */

	return (unsigned long)(elapsed * 1000000) / LATCH;

}

/*

 * IRQ handler for the timer.

 */

static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)

{

	volatile long nr_ticks;

	if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) {	/* This is a shared interrupt */

		write_seqlock(&xtime_lock);

		/* Get number to ticks performed before interrupt and clear PIT interrupt */

		nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));

		do {

			timer_tick();

			nr_ticks--;

		} while (nr_ticks);

		write_sequnlock(&xtime_lock);

		return IRQ_HANDLED;

	} else

		return IRQ_NONE;		/* not handled */

}

static struct irqaction at91sam926x_timer_irq = {

	.name		= "at91_tick",

	.flags		= IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,

	.handler	= at91sam926x_timer_interrupt

};

void at91sam926x_timer_reset(void)

{

	/* Disable timer */

	at91_sys_write(AT91_PIT_MR, 0);

	/* Clear any pending interrupts */

	(void) at91_sys_read(AT91_PIT_PIVR);

	/* Set Period Interval timer and enable its interrupt */

	at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);

}

/*

 * Set up timer interrupt.

 */

void __init at91sam926x_timer_init(void)

{

	/* Initialize and enable the timer */

	at91sam926x_timer_reset();

	/* Make IRQs happen for the system timer. */

	setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);

}

#ifdef CONFIG_PM

static void at91sam926x_timer_suspend(void)

{

	/* Disable timer */

	at91_sys_write(AT91_PIT_MR, 0);

}

#else

#define at91sam926x_timer_suspend	NULL

#endif

struct sys_timer at91sam926x_timer = {

	.init		= at91sam926x_timer_init,

	.offset		= at91sam926x_gettimeoffset,

	.suspend	= at91sam926x_timer_suspend,

	.resume		= at91sam926x_timer_reset,

};

/*

 * include/asm-arm/arch-at91rm9200/at91_pit.h

 *

 * Periodic Interval Timer (PIT) - System peripherals regsters.

 * Based on AT91SAM9261 datasheet revision D.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */

#ifndef AT91_PIT_H

#define AT91_PIT_H

#define AT91_PIT_MR		(AT91_PIT + 0x00)	/* Mode Register */

#define		AT91_PIT_PITIEN		(1 << 25)		/* Timer Interrupt Enable */

#define		AT91_PIT_PITEN		(1 << 24)		/* Timer Enabled */

#define		AT91_PIT_PIV		(0xfffff)		/* Periodic Interval Value */

#define AT91_PIT_SR		(AT91_PIT + 0x04)	/* Status Register */

#define		AT91_PIT_PITS		(1 << 0)		/* Timer Status */

#define AT91_PIT_PIVR		(AT91_PIT + 0x08)	/* Periodic Interval Value Register */

#define AT91_PIT_PIIR		(AT91_PIT + 0x0c)	/* Periodic Interval Image Register */

#define		AT91_PIT_PICNT		(0xfff << 20)		/* Interval Counter */

#define		AT91_PIT_CPIV		(0xfffff)		/* Inverval Value */

#endif