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Commit 193c0d68 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci 

Pull PCI update from Bjorn Helgaas:
 "Host bridge hotplug:
   - Untangle _PRT from struct pci_bus (Bjorn Helgaas)
   - Request _OSC control before scanning root bus (Taku Izumi)
   - Assign resources when adding host bridge (Yinghai Lu)
   - Remove root bus when removing host bridge (Yinghai Lu)
   - Remove _PRT during hot remove (Yinghai Lu)

  SRIOV
    - Add sysfs knobs to control numVFs (Don Dutile)

  Power management
   - Notify devices when power resource turned on (Huang Ying)

  Bug fixes
   - Work around broken _SEG on HP xw9300 (Bjorn Helgaas)
   - Keep runtime PM enabled for unbound PCI devices (Huang Ying)
   - Fix Optimus dual-GPU runtime D3 suspend issue (Dave Airlie)
   - Fix xen frontend shutdown issue (David Vrabel)
   - Work around PLX PCI 9050 BAR alignment erratum (Ian Abbott)

  Miscellaneous
   - Add GPL license for drivers/pci/ioapic (Andrew Cooks)
   - Add standard PCI-X, PCIe ASPM register #defines (Bjorn Helgaas)
   - NumaChip remote PCI support (Daniel Blueman)
   - Fix PCIe Link Capabilities Supported Link Speed definition (Jingoo
     Han)
   - Convert dev_printk() to dev_info(), etc (Joe Perches)
   - Add support for non PCI BAR ROM data (Matthew Garrett)
   - Add x86 support for host bridge translation offset (Mike Yoknis)
   - Report success only when every driver supports AER (Vijay
     Pandarathil)"

Fix up trivial conflicts.

* tag 'for-3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)
  PCI: Use phys_addr_t for physical ROM address
  x86/PCI: Add NumaChip remote PCI support
  ath9k: Use standard #defines for PCIe Capability ASPM fields
  iwlwifi: Use standard #defines for PCIe Capability ASPM fields
  iwlwifi: collapse wrapper for pcie_capability_read_word()
  iwlegacy: Use standard #defines for PCIe Capability ASPM fields
  iwlegacy: collapse wrapper for pcie_capability_read_word()
  cxgb3: Use standard #defines for PCIe Capability ASPM fields
  PCI: Add standard PCIe Capability Link ASPM field names
  PCI/portdrv: Use PCI Express Capability accessors
  PCI: Use standard PCIe Capability Link register field names
  x86: Use PCI setup data
  PCI: Add support for non-BAR ROMs
  PCI: Add pcibios_add_device
  EFI: Stash ROMs if they're not in the PCI BAR
  PCI: Add and use standard PCI-X Capability register names
  PCI/PM: Keep runtime PM enabled for unbound PCI devices
  xen-pcifront: Handle backend CLOSED without CLOSING
  PCI: SRIOV control and status via sysfs (documentation)
  PCI/AER: Report success only when every device has AER-aware driver
  ...
parents 8b0cab14 1cb73f8c

Documentation/ABI/testing/sysfs-bus-pci

+34 −0
Original line number Diff line number Diff line
@@ -222,3 +222,37 @@ Description: 
		satisfied too.  Reading this attribute will show the current

		value of d3cold_allowed bit.  Writing this attribute will set

		the value of d3cold_allowed bit.



What:		/sys/bus/pci/devices/.../sriov_totalvfs

Date:		November 2012

Contact:	Donald Dutile <ddutile@redhat.com>

Description:

		This file appears when a physical PCIe device supports SR-IOV.

		Userspace applications can read this file to determine the

		maximum number of Virtual Functions (VFs) a PCIe physical

		function (PF) can support. Typically, this is the value reported

		in the PF's SR-IOV extended capability structure's TotalVFs

		element.  Drivers have the ability at probe time to reduce the

		value read from this file via the pci_sriov_set_totalvfs()

		function.



What:		/sys/bus/pci/devices/.../sriov_numvfs

Date:		November 2012

Contact:	Donald Dutile <ddutile@redhat.com>

Description:

		This file appears when a physical PCIe device supports SR-IOV.

		Userspace applications can read and write to this file to

		determine and control the enablement or disablement of Virtual

		Functions (VFs) on the physical function (PF). A read of this

		file will return the number of VFs that are enabled on this PF.

		A number written to this file will enable the specified

		number of VFs. A userspace application would typically read the

		file and check that the value is zero, and then write the number

		of VFs that should be enabled on the PF; the value written

		should be less than or equal to the value in the sriov_totalvfs

		file. A userspace application wanting to disable the VFs would

		write a zero to this file. The core ensures that valid values

		are written to this file, and returns errors when values are not

		valid.  For example, writing a 2 to this file when sriov_numvfs

		is not 0 and not 2 already will return an error. Writing a 10

		when the value of sriov_totalvfs is 8 will return an error.

Documentation/PCI/pci-iov-howto.txt

+44 −4
Original line number Diff line number Diff line
@@ -2,6 +2,9 @@ 
		Copyright (C) 2009 Intel Corporation

		    Yu Zhao <yu.zhao@intel.com>



		Update: November 2012

			-- sysfs-based SRIOV enable-/disable-ment

		Donald Dutile <ddutile@redhat.com>



1. Overview
@@ -24,10 +27,21 @@ real existing PCI device. 


2.1 How can I enable SR-IOV capability



The device driver (PF driver) will control the enabling and disabling

of the capability via API provided by SR-IOV core. If the hardware

has SR-IOV capability, loading its PF driver would enable it and all

VFs associated with the PF.

Multiple methods are available for SR-IOV enablement.

In the first method, the device driver (PF driver) will control the

enabling and disabling of the capability via API provided by SR-IOV core.

If the hardware has SR-IOV capability, loading its PF driver would

enable it and all VFs associated with the PF.  Some PF drivers require

a module parameter to be set to determine the number of VFs to enable.

In the second method, a write to the sysfs file sriov_numvfs will

enable and disable the VFs associated with a PCIe PF.  This method

enables per-PF, VF enable/disable values versus the first method,

which applies to all PFs of the same device.  Additionally, the

PCI SRIOV core support ensures that enable/disable operations are

valid to reduce duplication in multiple drivers for the same

checks, e.g., check numvfs == 0 if enabling VFs, ensure

numvfs <= totalvfs.

The second method is the recommended method for new/future VF devices.



2.2 How can I use the Virtual Functions
@@ -40,13 +54,22 @@ requires device driver that is same as a normal PCI device's. 
3.1 SR-IOV API



To enable SR-IOV capability:

(a) For the first method, in the driver:

	int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);

	'nr_virtfn' is number of VFs to be enabled.

(b) For the second method, from sysfs:

	echo 'nr_virtfn' > \

        /sys/bus/pci/devices/<DOMAIN:BUS:DEVICE.FUNCTION>/sriov_numvfs



To disable SR-IOV capability:

(a) For the first method, in the driver:

	void pci_disable_sriov(struct pci_dev *dev);

(b) For the second method, from sysfs:

	echo  0 > \

        /sys/bus/pci/devices/<DOMAIN:BUS:DEVICE.FUNCTION>/sriov_numvfs



To notify SR-IOV core of Virtual Function Migration:

(a) In the driver:

	irqreturn_t pci_sriov_migration(struct pci_dev *dev);



3.2 Usage example
@@ -88,6 +111,22 @@ static void dev_shutdown(struct pci_dev *dev) 
	...

}



static int dev_sriov_configure(struct pci_dev *dev, int numvfs)

{

	if (numvfs > 0) {

		...

		pci_enable_sriov(dev, numvfs);

		...

		return numvfs;

	}

	if (numvfs == 0) {

		....

		pci_disable_sriov(dev);

		...

		return 0;

	}

}



static struct pci_driver dev_driver = {

	.name =		"SR-IOV Physical Function driver",

	.id_table =	dev_id_table,
@@ -96,4 +135,5 @@ static struct pci_driver dev_driver = { 
	.suspend =	dev_suspend,

	.resume =	dev_resume,

	.shutdown =	dev_shutdown,

	.sriov_configure = dev_sriov_configure,

};

arch/x86/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -370,6 +370,7 @@ config X86_NUMACHIP 
	depends on NUMA

	depends on SMP

	depends on X86_X2APIC

	depends on PCI_MMCONFIG

	---help---

	  Adds support for Numascale NumaChip large-SMP systems. Needed to

	  enable more than ~168 cores.

arch/x86/boot/compressed/eboot.c

+118 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
 * ----------------------------------------------------------------------- */



#include <linux/efi.h>

#include <linux/pci.h>

#include <asm/efi.h>

#include <asm/setup.h>

#include <asm/desc.h>
@@ -245,6 +246,121 @@ static void find_bits(unsigned long mask, u8 *pos, u8 *size) 
	*size = len;

}



static efi_status_t setup_efi_pci(struct boot_params *params)

{

	efi_pci_io_protocol *pci;

	efi_status_t status;

	void **pci_handle;

	efi_guid_t pci_proto = EFI_PCI_IO_PROTOCOL_GUID;

	unsigned long nr_pci, size = 0;

	int i;

	struct setup_data *data;



	data = (struct setup_data *)params->hdr.setup_data;



	while (data && data->next)

		data = (struct setup_data *)data->next;



	status = efi_call_phys5(sys_table->boottime->locate_handle,

				EFI_LOCATE_BY_PROTOCOL, &pci_proto,

				NULL, &size, pci_handle);



	if (status == EFI_BUFFER_TOO_SMALL) {

		status = efi_call_phys3(sys_table->boottime->allocate_pool,

					EFI_LOADER_DATA, size, &pci_handle);



		if (status != EFI_SUCCESS)

			return status;



		status = efi_call_phys5(sys_table->boottime->locate_handle,

					EFI_LOCATE_BY_PROTOCOL, &pci_proto,

					NULL, &size, pci_handle);

	}



	if (status != EFI_SUCCESS)

		goto free_handle;



	nr_pci = size / sizeof(void *);

	for (i = 0; i < nr_pci; i++) {

		void *h = pci_handle[i];

		uint64_t attributes;

		struct pci_setup_rom *rom;



		status = efi_call_phys3(sys_table->boottime->handle_protocol,

					h, &pci_proto, &pci);



		if (status != EFI_SUCCESS)

			continue;



		if (!pci)

			continue;



		status = efi_call_phys4(pci->attributes, pci,

					EfiPciIoAttributeOperationGet, 0,

					&attributes);



		if (status != EFI_SUCCESS)

			continue;



		if (!attributes & EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM)

			continue;



		if (!pci->romimage || !pci->romsize)

			continue;



		size = pci->romsize + sizeof(*rom);



		status = efi_call_phys3(sys_table->boottime->allocate_pool,

				EFI_LOADER_DATA, size, &rom);



		if (status != EFI_SUCCESS)

			continue;



		rom->data.type = SETUP_PCI;

		rom->data.len = size - sizeof(struct setup_data);

		rom->data.next = 0;

		rom->pcilen = pci->romsize;



		status = efi_call_phys5(pci->pci.read, pci,

					EfiPciIoWidthUint16, PCI_VENDOR_ID,

					1, &(rom->vendor));



		if (status != EFI_SUCCESS)

			goto free_struct;



		status = efi_call_phys5(pci->pci.read, pci,

					EfiPciIoWidthUint16, PCI_DEVICE_ID,

					1, &(rom->devid));



		if (status != EFI_SUCCESS)

			goto free_struct;



		status = efi_call_phys5(pci->get_location, pci,

					&(rom->segment), &(rom->bus),

					&(rom->device), &(rom->function));



		if (status != EFI_SUCCESS)

			goto free_struct;



		memcpy(rom->romdata, pci->romimage, pci->romsize);



		if (data)

			data->next = (uint64_t)rom;

		else

			params->hdr.setup_data = (uint64_t)rom;



		data = (struct setup_data *)rom;



		continue;

	free_struct:

		efi_call_phys1(sys_table->boottime->free_pool, rom);

	}



free_handle:

	efi_call_phys1(sys_table->boottime->free_pool, pci_handle);

	return status;

}



/*

 * See if we have Graphics Output Protocol

 */
@@ -1028,6 +1144,8 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table, 


	setup_graphics(boot_params);



	setup_efi_pci(boot_params);



	status = efi_call_phys3(sys_table->boottime->allocate_pool,

				EFI_LOADER_DATA, sizeof(*gdt),

				(void **)&gdt);

arch/x86/include/asm/bootparam.h

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#define SETUP_NONE			0

#define SETUP_E820_EXT			1

#define SETUP_DTB			2

#define SETUP_PCI			3



/* extensible setup data list node */

struct setup_data {