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Commit 190b509c authored by Tal Gilboa's avatar Tal Gilboa Committed by Bjorn Helgaas
Browse files

net/mlx4_core: Report PCIe link properties with pcie_print_link_status() 



Use pcie_print_link_status() to report PCIe link speed and possible
limitations instead of implementing this in the driver itself.

Signed-off-by: default avatarTal Gilboa <talgi@mellanox.com>
Signed-off-by: default avatarTariq Toukan <tariqt@mellanox.com>
[bhelgaas: changelog]
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 9e506a7b

drivers/net/ethernet/mellanox/mlx4/main.c

+1 −80
Original line number Original line Diff line number Diff line
@@ -623,85 +623,6 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) 
	return 0;

	return 0;

}

}





static int mlx4_get_pcie_dev_link_caps(struct mlx4_dev *dev,

				       enum pci_bus_speed *speed,

				       enum pcie_link_width *width)

{

	u32 lnkcap1, lnkcap2;

	int err1, err2;



#define  PCIE_MLW_CAP_SHIFT 4	/* start of MLW mask in link capabilities */



	*speed = PCI_SPEED_UNKNOWN;

	*width = PCIE_LNK_WIDTH_UNKNOWN;



	err1 = pcie_capability_read_dword(dev->persist->pdev, PCI_EXP_LNKCAP,

					  &lnkcap1);

	err2 = pcie_capability_read_dword(dev->persist->pdev, PCI_EXP_LNKCAP2,

					  &lnkcap2);

	if (!err2 && lnkcap2) { /* PCIe r3.0-compliant */

		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)

			*speed = PCIE_SPEED_8_0GT;

		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)

			*speed = PCIE_SPEED_5_0GT;

		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)

			*speed = PCIE_SPEED_2_5GT;

	}

	if (!err1) {

		*width = (lnkcap1 & PCI_EXP_LNKCAP_MLW) >> PCIE_MLW_CAP_SHIFT;

		if (!lnkcap2) { /* pre-r3.0 */

			if (lnkcap1 & PCI_EXP_LNKCAP_SLS_5_0GB)

				*speed = PCIE_SPEED_5_0GT;

			else if (lnkcap1 & PCI_EXP_LNKCAP_SLS_2_5GB)

				*speed = PCIE_SPEED_2_5GT;

		}

	}



	if (*speed == PCI_SPEED_UNKNOWN || *width == PCIE_LNK_WIDTH_UNKNOWN) {

		return err1 ? err1 :

			err2 ? err2 : -EINVAL;

	}

	return 0;

}



static void mlx4_check_pcie_caps(struct mlx4_dev *dev)

{

	enum pcie_link_width width, width_cap;

	enum pci_bus_speed speed, speed_cap;

	int err;



#define PCIE_SPEED_STR(speed) \

	(speed == PCIE_SPEED_8_0GT ? "8.0GT/s" : \

	 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" : \

	 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" : \

	 "Unknown")



	err = mlx4_get_pcie_dev_link_caps(dev, &speed_cap, &width_cap);

	if (err) {

		mlx4_warn(dev,

			  "Unable to determine PCIe device BW capabilities\n");

		return;

	}



	err = pcie_get_minimum_link(dev->persist->pdev, &speed, &width);

	if (err || speed == PCI_SPEED_UNKNOWN ||

	    width == PCIE_LNK_WIDTH_UNKNOWN) {

		mlx4_warn(dev,

			  "Unable to determine PCI device chain minimum BW\n");

		return;

	}



	if (width != width_cap || speed != speed_cap)

		mlx4_warn(dev,

			  "PCIe BW is different than device's capability\n");



	mlx4_info(dev, "PCIe link speed is %s, device supports %s\n",

		  PCIE_SPEED_STR(speed), PCIE_SPEED_STR(speed_cap));

	mlx4_info(dev, "PCIe link width is x%d, device supports x%d\n",

		  width, width_cap);

	return;

}



/*The function checks if there are live vf, return the num of them*/

/*The function checks if there are live vf, return the num of them*/

static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)

static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)

{

{
@@ -3475,7 +3396,7 @@ static int mlx4_load_one(struct pci_dev *pdev, int pci_dev_data, 
	 * express device capabilities are under-satisfied by the bus.

	 * express device capabilities are under-satisfied by the bus.

	 */

	 */

	if (!mlx4_is_slave(dev))

	if (!mlx4_is_slave(dev))

		mlx4_check_pcie_caps(dev);

		pcie_print_link_status(dev->persist->pdev);





	/* In master functions, the communication channel must be initialized

	/* In master functions, the communication channel must be initialized

	 * after obtaining its address from fw */

	 * after obtaining its address from fw */