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Commit 185829ef authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu into next/dt 

Merge "ARM: mvebu: DT changes for v3.17 (round 2)" from Jason Cooper:

mvebu DT changes for v3.17 (round 2):

 - kirkwood
  * Add d2 Network v2 board

 - mvebu
  * Add Armada 375 ethernet node
  * Add CA9 MPcore SoC controller node
  * Add support for dynamic freq scaling on Armada XP

* tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu

:
  ARM: mvebu: update Armada XP DT for dynamic frequency scaling
  ARM: mvebu: add CA9 MPcore SoC Controller node
  ARM: mvebu: Enable the network controller in Armada 375 DB board
  ARM: mvebu: Add support for the network controller in Armada 375 SoC
  ARM: Kirkwood: add DT support for d2 Network v2
  ARM: Kirkwood: allow to use netxbig DTSI for d2net_v2 DTS

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 87adf92b 38436078

Documentation/devicetree/bindings/arm/armada-380-mpcore-soc-ctrl.txt

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Marvell Armada 38x CA9 MPcore SoC Controller

============================================



Required properties:



- compatible: Should be "marvell,armada-380-mpcore-soc-ctrl".



- reg: should be the register base and length as documented in the

  datasheet for the CA9 MPcore SoC Control registers



mpcore-soc-ctrl@20d20 {

	compatible = "marvell,armada-380-mpcore-soc-ctrl";

	reg = <0x20d20 0x6c>;

};

arch/arm/boot/dts/Makefile

+1 −0
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@@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \ 
kirkwood := \

	kirkwood-b3.dtb \

	kirkwood-cloudbox.dtb \

	kirkwood-d2net.dtb \

	kirkwood-db-88f6281.dtb \

	kirkwood-db-88f6282.dtb \

	kirkwood-dns320.dtb \

arch/arm/boot/dts/armada-375-db.dts

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@@ -123,6 +123,32 @@ 
				cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;

				wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;

			};



			mdio {

				phy0: ethernet-phy@0 {

					reg = <0>;

				};



				phy3: ethernet-phy@3 {

					reg = <3>;

				};

			};



			ethernet@f0000 {

				status = "okay";



				eth0@c4000 {

					status = "okay";

					phy = <&phy0>;

					phy-mode = "rgmii-id";

				};



				eth1@c5000 {

					status = "okay";

					phy = <&phy3>;

					phy-mode = "gmii";

				};

			};

		};



		pcie-controller {

arch/arm/boot/dts/armada-375.dtsi

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@@ -151,6 +151,37 @@ 
				      <0xc100 0x100>;

			};



			mdio {

				#address-cells = <1>;

				#size-cells = <0>;

				compatible = "marvell,orion-mdio";

				reg = <0xc0054 0x4>;

			};



			/* Network controller */

			ethernet@f0000 {

				compatible = "marvell,armada-375-pp2";

				reg = <0xf0000 0xa000>, /* Packet Processor regs */

				      <0xc0000 0x3060>, /* LMS regs */

				      <0xc4000 0x100>,  /* eth0 regs */

				      <0xc5000 0x100>;  /* eth1 regs */

				clocks = <&gateclk 3>, <&gateclk 19>;

				clock-names = "pp_clk", "gop_clk";

				status = "disabled";



				eth0: eth0@c4000 {

					interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

					port-id = <0>;

					status = "disabled";

				};



				eth1: eth1@c5000 {

					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

					port-id = <1>;

					status = "disabled";

				};

			};



			spi0: spi@10600 {

				compatible = "marvell,orion-spi";

				reg = <0x10600 0x50>;

arch/arm/boot/dts/armada-38x.dtsi

+5 −0
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@@ -286,6 +286,11 @@ 
				reg = <0x20800 0x10>;

			};



			mpcore-soc-ctrl@20d20 {

				compatible = "marvell,armada-380-mpcore-soc-ctrl";

				reg = <0x20d20 0x6c>;

			};



			coherency-fabric@21010 {

				compatible = "marvell,armada-380-coherency-fabric";

				reg = <0x21010 0x1c>;