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Commit 16be17af authored by Nick Hoath's avatar Nick Hoath Committed by Daniel Vetter
Browse files

drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also. 



Signed-off-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 27160c96

drivers/gpu/drm/i915/intel_ringbuffer.c

+1 −1
Original line number Diff line number Diff line
@@ -957,7 +957,7 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) 
	/* WaDisablePartialResolveInVc:skl,bxt */

	WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE);



	/* WaCcsTlbPrefetchDisable:skl */

	/* WaCcsTlbPrefetchDisable:skl,bxt */

	WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,

			  GEN9_CCS_TLB_PREFETCH_ENABLE);