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Commit 1633bf11 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlx5e-tstamp' 



Saeed Mahameed says:

====================
Introduce mlx5 ethernet timestamping

This patch series introduces the support for ConnectX-4 timestamping
and the PTP kernel interface.

Changes from V2:
net/mlx5_core: Introduce access function to read internal_timer
	- Remove one line function
	- Change function name

net/mlx5e: Add HW timestamping (TS) support:
	- Data path performance optimization (caching tstamp struct in rq,sq)
	- Change read/write_lock_irqsave to read/write_lock
	- Move ioctl functions to en_clock file
	- Changed overflow start algorithm according to comments from Richard
	- Move timestamp init/cleanup to open/close ndos.

In details:

1st patch prevents the driver from modifying skb->data and SKB CB in
device xmit function.

2nd patch adds the needed low level helpers for:
	- Fetching the hardware clock (hardware internal timer)
	- Parsing CQEs timestamps
	- Device frequency capability

3rd patch adds new en_clock.c file that handles all needed timestamping
operations:
	- Internal clock structure initialization and other helper functions
	- Added the needed ioctl for setting/getting the current timestamping
	  configuration.
	- used this configuration in RX/TX data path to fill the SKB with
	  the timestamp.

4th patch Introduces PTP (PHC) support.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 33c15297 3d8c38af

drivers/net/ethernet/mellanox/mlx5/core/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ config MLX5_CORE 
config MLX5_CORE_EN

	bool "Mellanox Technologies ConnectX-4 Ethernet support"

	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE

	select PTP_1588_CLOCK

	default n

	---help---

	  Ethernet support in Mellanox Technologies ConnectX-4 NIC.

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,4 +5,4 @@ mlx5_core-y := main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \ 
		mad.o transobj.o vport.o sriov.o fs_cmd.o fs_core.o

mlx5_core-$(CONFIG_MLX5_CORE_EN) += wq.o eswitch.o \

		en_main.o en_fs.o en_ethtool.o en_tx.o en_rx.o \

		en_txrx.o
 
		en_txrx.o en_clock.o

drivers/net/ethernet/mellanox/mlx5/core/en.h

+28 −3
Original line number Diff line number Diff line
@@ -32,6 +32,9 @@ 


#include <linux/if_vlan.h>

#include <linux/etherdevice.h>

#include <linux/timecounter.h>

#include <linux/net_tstamp.h>

#include <linux/ptp_clock_kernel.h>

#include <linux/mlx5/driver.h>

#include <linux/mlx5/qp.h>

#include <linux/mlx5/cq.h>
@@ -284,6 +287,19 @@ struct mlx5e_params { 
	u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];

};



struct mlx5e_tstamp {

	rwlock_t                   lock;

	struct cyclecounter        cycles;

	struct timecounter         clock;

	struct hwtstamp_config     hwtstamp_config;

	u32                        nominal_c_mult;

	unsigned long              overflow_period;

	struct delayed_work        overflow_work;

	struct mlx5_core_dev      *mdev;

	struct ptp_clock          *ptp;

	struct ptp_clock_info      ptp_info;

};



enum {

	MLX5E_RQ_STATE_POST_WQES_ENABLE,

};
@@ -315,6 +331,7 @@ struct mlx5e_rq { 


	struct device         *pdev;

	struct net_device     *netdev;

	struct mlx5e_tstamp   *tstamp;

	struct mlx5e_rq_stats  stats;

	struct mlx5e_cq        cq;
@@ -328,14 +345,12 @@ struct mlx5e_rq { 
	struct mlx5e_priv     *priv;

} ____cacheline_aligned_in_smp;



struct mlx5e_tx_skb_cb {

struct mlx5e_tx_wqe_info {

	u32 num_bytes;

	u8  num_wqebbs;

	u8  num_dma;

};



#define MLX5E_TX_SKB_CB(__skb) ((struct mlx5e_tx_skb_cb *)__skb->cb)



enum mlx5e_dma_map_type {

	MLX5E_DMA_MAP_SINGLE,

	MLX5E_DMA_MAP_PAGE
@@ -371,6 +386,7 @@ struct mlx5e_sq { 
	/* pointers to per packet info: write@xmit, read@completion */

	struct sk_buff           **skb;

	struct mlx5e_sq_dma       *dma_fifo;

	struct mlx5e_tx_wqe_info  *wqe_info;



	/* read only */

	struct mlx5_wq_cyc         wq;
@@ -383,6 +399,7 @@ struct mlx5e_sq { 
	u16                        max_inline;

	u16                        edge;

	struct device             *pdev;

	struct mlx5e_tstamp       *tstamp;

	__be32                     mkey_be;

	unsigned long              state;
@@ -519,6 +536,7 @@ struct mlx5e_priv { 
	struct mlx5_core_dev      *mdev;

	struct net_device         *netdev;

	struct mlx5e_stats         stats;

	struct mlx5e_tstamp        tstamp;

};



#define MLX5E_NET_IP_ALIGN 2
@@ -585,6 +603,13 @@ void mlx5e_destroy_flow_tables(struct mlx5e_priv *priv); 
void mlx5e_init_eth_addr(struct mlx5e_priv *priv);

void mlx5e_set_rx_mode_work(struct work_struct *work);



void mlx5e_fill_hwstamp(struct mlx5e_tstamp *clock, u64 timestamp,

			struct skb_shared_hwtstamps *hwts);

void mlx5e_timestamp_init(struct mlx5e_priv *priv);

void mlx5e_timestamp_cleanup(struct mlx5e_priv *priv);

int mlx5e_hwstamp_set(struct net_device *dev, struct ifreq *ifr);

int mlx5e_hwstamp_get(struct net_device *dev, struct ifreq *ifr);



int mlx5e_vlan_rx_add_vid(struct net_device *dev, __always_unused __be16 proto,

			  u16 vid);

int mlx5e_vlan_rx_kill_vid(struct net_device *dev, __always_unused __be16 proto,

drivers/net/ethernet/mellanox/mlx5/core/en_clock.c

0 → 100644
+287 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.

 *

 * This software is available to you under a choice of one of two

 * licenses.  You may choose to be licensed under the terms of the GNU

 * General Public License (GPL) Version 2, available from the file

 * COPYING in the main directory of this source tree, or the

 * OpenIB.org BSD license below:

 *

 *     Redistribution and use in source and binary forms, with or

 *     without modification, are permitted provided that the following

 *     conditions are met:

 *

 *      - Redistributions of source code must retain the above

 *        copyright notice, this list of conditions and the following

 *        disclaimer.

 *

 *      - Redistributions in binary form must reproduce the above

 *        copyright notice, this list of conditions and the following

 *        disclaimer in the documentation and/or other materials

 *        provided with the distribution.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS

 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN

 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE

 * SOFTWARE.

 */



#include <linux/clocksource.h>

#include "en.h"



enum {

	MLX5E_CYCLES_SHIFT	= 23

};



void mlx5e_fill_hwstamp(struct mlx5e_tstamp *tstamp, u64 timestamp,

			struct skb_shared_hwtstamps *hwts)

{

	u64 nsec;



	read_lock(&tstamp->lock);

	nsec = timecounter_cyc2time(&tstamp->clock, timestamp);

	read_unlock(&tstamp->lock);



	hwts->hwtstamp = ns_to_ktime(nsec);

}



static cycle_t mlx5e_read_internal_timer(const struct cyclecounter *cc)

{

	struct mlx5e_tstamp *tstamp = container_of(cc, struct mlx5e_tstamp,

						   cycles);



	return mlx5_read_internal_timer(tstamp->mdev) & cc->mask;

}



static void mlx5e_timestamp_overflow(struct work_struct *work)

{

	struct delayed_work *dwork = to_delayed_work(work);

	struct mlx5e_tstamp *tstamp = container_of(dwork, struct mlx5e_tstamp,

						   overflow_work);



	write_lock(&tstamp->lock);

	timecounter_read(&tstamp->clock);

	write_unlock(&tstamp->lock);

	schedule_delayed_work(&tstamp->overflow_work, tstamp->overflow_period);

}



int mlx5e_hwstamp_set(struct net_device *dev, struct ifreq *ifr)

{

	struct mlx5e_priv *priv = netdev_priv(dev);

	struct hwtstamp_config config;



	if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))

		return -EOPNOTSUPP;



	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))

		return -EFAULT;



	/* TX HW timestamp */

	switch (config.tx_type) {

	case HWTSTAMP_TX_OFF:

	case HWTSTAMP_TX_ON:

		break;

	default:

		return -ERANGE;

	}



	/* RX HW timestamp */

	switch (config.rx_filter) {

	case HWTSTAMP_FILTER_NONE:

		break;

	case HWTSTAMP_FILTER_ALL:

	case HWTSTAMP_FILTER_SOME:

	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:

	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:

	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:

	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:

	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:

	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:

	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:

	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:

	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:

	case HWTSTAMP_FILTER_PTP_V2_EVENT:

	case HWTSTAMP_FILTER_PTP_V2_SYNC:

	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:

		config.rx_filter = HWTSTAMP_FILTER_ALL;

		break;

	default:

		return -ERANGE;

	}



	memcpy(&priv->tstamp.hwtstamp_config, &config, sizeof(config));



	return copy_to_user(ifr->ifr_data, &config,

			    sizeof(config)) ? -EFAULT : 0;

}



int mlx5e_hwstamp_get(struct net_device *dev, struct ifreq *ifr)

{

	struct mlx5e_priv *priv = netdev_priv(dev);

	struct hwtstamp_config *cfg = &priv->tstamp.hwtstamp_config;



	if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))

		return -EOPNOTSUPP;



	return copy_to_user(ifr->ifr_data, cfg, sizeof(*cfg)) ? -EFAULT : 0;

}



static int mlx5e_ptp_settime(struct ptp_clock_info *ptp,

			     const struct timespec64 *ts)

{

	struct mlx5e_tstamp *tstamp = container_of(ptp, struct mlx5e_tstamp,

						   ptp_info);

	u64 ns = timespec64_to_ns(ts);



	write_lock(&tstamp->lock);

	timecounter_init(&tstamp->clock, &tstamp->cycles, ns);

	write_unlock(&tstamp->lock);



	return 0;

}



static int mlx5e_ptp_gettime(struct ptp_clock_info *ptp,

			     struct timespec64 *ts)

{

	struct mlx5e_tstamp *tstamp = container_of(ptp, struct mlx5e_tstamp,

						   ptp_info);

	u64 ns;



	write_lock(&tstamp->lock);

	ns = timecounter_read(&tstamp->clock);

	write_unlock(&tstamp->lock);



	*ts = ns_to_timespec64(ns);



	return 0;

}



static int mlx5e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)

{

	struct mlx5e_tstamp *tstamp = container_of(ptp, struct mlx5e_tstamp,

						   ptp_info);



	write_lock(&tstamp->lock);

	timecounter_adjtime(&tstamp->clock, delta);

	write_unlock(&tstamp->lock);



	return 0;

}



static int mlx5e_ptp_adjfreq(struct ptp_clock_info *ptp, s32 delta)

{

	u64 adj;

	u32 diff;

	int neg_adj = 0;

	struct mlx5e_tstamp *tstamp = container_of(ptp, struct mlx5e_tstamp,

						  ptp_info);



	if (delta < 0) {

		neg_adj = 1;

		delta = -delta;

	}



	adj = tstamp->nominal_c_mult;

	adj *= delta;

	diff = div_u64(adj, 1000000000ULL);



	write_lock(&tstamp->lock);

	timecounter_read(&tstamp->clock);

	tstamp->cycles.mult = neg_adj ? tstamp->nominal_c_mult - diff :

					tstamp->nominal_c_mult + diff;

	write_unlock(&tstamp->lock);



	return 0;

}



static const struct ptp_clock_info mlx5e_ptp_clock_info = {

	.owner		= THIS_MODULE,

	.max_adj	= 100000000,

	.n_alarm	= 0,

	.n_ext_ts	= 0,

	.n_per_out	= 0,

	.n_pins		= 0,

	.pps		= 0,

	.adjfreq	= mlx5e_ptp_adjfreq,

	.adjtime	= mlx5e_ptp_adjtime,

	.gettime64	= mlx5e_ptp_gettime,

	.settime64	= mlx5e_ptp_settime,

	.enable		= NULL,

};



static void mlx5e_timestamp_init_config(struct mlx5e_tstamp *tstamp)

{

	tstamp->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;

	tstamp->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;

}



void mlx5e_timestamp_init(struct mlx5e_priv *priv)

{

	struct mlx5e_tstamp *tstamp = &priv->tstamp;

	u64 ns;

	u64 frac = 0;

	u32 dev_freq;



	mlx5e_timestamp_init_config(tstamp);

	dev_freq = MLX5_CAP_GEN(priv->mdev, device_frequency_khz);

	if (!dev_freq) {

		mlx5_core_warn(priv->mdev, "invalid device_frequency_khz, aborting HW clock init\n");

		return;

	}

	rwlock_init(&tstamp->lock);

	tstamp->cycles.read = mlx5e_read_internal_timer;

	tstamp->cycles.shift = MLX5E_CYCLES_SHIFT;

	tstamp->cycles.mult = clocksource_khz2mult(dev_freq,

						   tstamp->cycles.shift);

	tstamp->nominal_c_mult = tstamp->cycles.mult;

	tstamp->cycles.mask = CLOCKSOURCE_MASK(41);

	tstamp->mdev = priv->mdev;



	timecounter_init(&tstamp->clock, &tstamp->cycles,

			 ktime_to_ns(ktime_get_real()));



	/* Calculate period in seconds to call the overflow watchdog - to make

	 * sure counter is checked at least once every wrap around.

	 */

	ns = cyclecounter_cyc2ns(&tstamp->cycles, tstamp->cycles.mask,

				 frac, &frac);

	do_div(ns, NSEC_PER_SEC / 2 / HZ);

	tstamp->overflow_period = ns;



	INIT_DELAYED_WORK(&tstamp->overflow_work, mlx5e_timestamp_overflow);

	if (tstamp->overflow_period)

		schedule_delayed_work(&tstamp->overflow_work, 0);

	else

		mlx5_core_warn(priv->mdev, "invalid overflow period, overflow_work is not scheduled\n");



	/* Configure the PHC */

	tstamp->ptp_info = mlx5e_ptp_clock_info;

	snprintf(tstamp->ptp_info.name, 16, "mlx5 ptp");



	tstamp->ptp = ptp_clock_register(&tstamp->ptp_info,

					 &priv->mdev->pdev->dev);

	if (IS_ERR_OR_NULL(tstamp->ptp)) {

		mlx5_core_warn(priv->mdev, "ptp_clock_register failed %ld\n",

			       PTR_ERR(tstamp->ptp));

		tstamp->ptp = NULL;

	}

}



void mlx5e_timestamp_cleanup(struct mlx5e_priv *priv)

{

	struct mlx5e_tstamp *tstamp = &priv->tstamp;



	if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))

		return;



	if (priv->tstamp.ptp) {

		ptp_clock_unregister(priv->tstamp.ptp);

		priv->tstamp.ptp = NULL;

	}



	cancel_delayed_work_sync(&tstamp->overflow_work);

}

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+30 −0
Original line number Diff line number Diff line
@@ -855,6 +855,35 @@ static int mlx5e_set_pauseparam(struct net_device *netdev, 
	return err;

}



static int mlx5e_get_ts_info(struct net_device *dev,

			     struct ethtool_ts_info *info)

{

	struct mlx5e_priv *priv = netdev_priv(dev);

	int ret;



	ret = ethtool_op_get_ts_info(dev, info);

	if (ret)

		return ret;



	info->phc_index = priv->tstamp.ptp ?

			  ptp_clock_index(priv->tstamp.ptp) : -1;



	if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))

		return 0;



	info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |

				 SOF_TIMESTAMPING_RX_HARDWARE |

				 SOF_TIMESTAMPING_RAW_HARDWARE;



	info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |

			 (BIT(1) << HWTSTAMP_TX_ON);



	info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |

			   (BIT(1) << HWTSTAMP_FILTER_ALL);



	return 0;

}



const struct ethtool_ops mlx5e_ethtool_ops = {

	.get_drvinfo       = mlx5e_get_drvinfo,

	.get_link          = ethtool_op_get_link,
@@ -878,4 +907,5 @@ const struct ethtool_ops mlx5e_ethtool_ops = { 
	.set_tunable       = mlx5e_set_tunable,

	.get_pauseparam    = mlx5e_get_pauseparam,

	.set_pauseparam    = mlx5e_set_pauseparam,

	.get_ts_info       = mlx5e_get_ts_info,

};