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Commit 15ee8f02 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Andy Gross
Browse files

arm64: dts: msm8916: Add cpu cooling maps



Add cpu cooling maps for cpu passive trip points. The cpu cooling
device states are mapped to cpufreq based scaling frequencies.

Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 68ae3d0c
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+19 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
#include <dt-bindings/reset/qcom,gcc-msm8916.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	model = "Qualcomm Technologies, Inc. MSM8916";
@@ -115,6 +116,7 @@
			cpu-idle-states = <&CPU_SPC>;
			clocks = <&apcs 0>;
			operating-points-v2 = <&cpu_opp_table>;
			#cooling-cells = <2>;
		};

		CPU1: cpu@1 {
@@ -126,6 +128,7 @@
			cpu-idle-states = <&CPU_SPC>;
			clocks = <&apcs 0>;
			operating-points-v2 = <&cpu_opp_table>;
			#cooling-cells = <2>;
		};

		CPU2: cpu@2 {
@@ -137,6 +140,7 @@
			cpu-idle-states = <&CPU_SPC>;
			clocks = <&apcs 0>;
			operating-points-v2 = <&cpu_opp_table>;
			#cooling-cells = <2>;
		};

		CPU3: cpu@3 {
@@ -148,6 +152,7 @@
			cpu-idle-states = <&CPU_SPC>;
			clocks = <&apcs 0>;
			operating-points-v2 = <&cpu_opp_table>;
			#cooling-cells = <2>;
		};

		L2_0: l2-cache {
@@ -196,6 +201,13 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu-thermal1 {
@@ -216,6 +228,13 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

	};