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Commit 1447dde0 authored by Sonika Jindal's avatar Sonika Jindal Committed by Daniel Vetter
Browse files

drm/i915/skl: Add 180 degree HW rotation support 



Add support for 180 degree rotation for primary and sprite planes

Signed-off-by: default avatarSonika Jindal <sonika.jindal@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent bb9059d3

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -4579,6 +4579,9 @@ enum punit_power_well { 
#define   PLANE_CTL_ALPHA_DISABLE		(  0 << 4)

#define   PLANE_CTL_ALPHA_SW_PREMULTIPLY	(  2 << 4)

#define   PLANE_CTL_ALPHA_HW_PREMULTIPLY	(  3 << 4)

#define   PLANE_CTL_ROTATE_MASK			0x3

#define   PLANE_CTL_ROTATE_0			0x0

#define   PLANE_CTL_ROTATE_180			0x2

#define _PLANE_STRIDE_1_A			0x70188

#define _PLANE_STRIDE_2_A			0x70288

#define _PLANE_STRIDE_3_A			0x70388

drivers/gpu/drm/i915/intel_display.c

+2 −0
Original line number Diff line number Diff line
@@ -2694,6 +2694,8 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, 
	}



	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;

	if (to_intel_plane(crtc->primary)->rotation == BIT(DRM_ROTATE_180))

		plane_ctl |= PLANE_CTL_ROTATE_180;



	I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl);

drivers/gpu/drm/i915/intel_sprite.c

+3 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, 
	plane_ctl &= ~PLANE_CTL_YUV422_ORDER_MASK;

	plane_ctl &= ~PLANE_CTL_TILED_MASK;

	plane_ctl &= ~PLANE_CTL_ALPHA_MASK;

	plane_ctl &= ~PLANE_CTL_ROTATE_MASK;



	/* Trickle feed has to be enabled */

	plane_ctl &= ~PLANE_CTL_TRICKLE_FEED_DISABLE;
@@ -217,6 +218,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, 
	default:

		BUG();

	}

	if (intel_plane->rotation == BIT(DRM_ROTATE_180))

		plane_ctl |= PLANE_CTL_ROTATE_180;



	plane_ctl |= PLANE_CTL_ENABLE;

	plane_ctl |= PLANE_CTL_PIPE_CSC_ENABLE;